A generalized multilevel inverter based on T-Type switched capacitor module with reduced devices

Conventional multilevel inverters have problems in terms of their complicated expansion and large number of devices. This paper proposes a modular expanded multilevel inverter, which can effectively simplify the expansion and reduce the number of devices. The proposed inverter can ensure the voltage balancing of the voltage-dividing capacitors. The cascading of the T-type switched capacitor module and the step-by-step charging method of the switched capacitors enable the inverter to achieve high output voltage levels and voltage gain. In addition, the inversion can be achieved without the H-bridge, which greatly reduces the total standing voltage of the switches. The nine-level inverter of the proposed topology can be realized with only ten switches, obtaining a voltage gain that is two times larger. The above merits were validated through theoretical analysis and experiments. The proposed inverter has good application prospects in medium- and low-voltage photovoltaic power generation

Common-Ground-Type Single-Source High Step-Up Cascaded Multilevel Inverter for Transformerless PV Applications

The cascaded multilevel inverter (CMI) is one type of common inverter in industrial applications. This type of inverter can be synthesized either as a symmetric configuration with several identical H-bridge (HB) cells or as an asymmetric configuration with non-identical HB cells. In photovoltaic (PV) applications with the CMI, the PV modules can be used to replace the isolated dc sources; however, this brings inter-module leakage currents. To tackle the issue, the single-source CMI is preferred. Furthermore, in a grid-tied PV system, the main constraint is the capacitive leakage current. This problem can be addressed by providing a common ground, which is shared by PV modules and the ac grid. This paper thus proposes a topology that fulfills the mentioned requirements and thus, CMI is a promising inverter with wide-ranging industrial uses, such as PV applications. The proposed CMI topology also features high boosting capability, fault current limiting, and a transformerless configuration. To demonstrate the capabilities of this CMI, simulations and experimental results are provided

Grid-Connected Single-Star Bridge-Cells Modular Multilevel Cascaded Converter with Selective Harmonic Elimination Techniques

Nowadays, Renewable Energy Sources (RESs) are receiving enormous attention due to the noticeable exhaustion of fossil fuel and its emission of greenhouse gases. DC-AC converters have attracted the attention of the researchers, as they are entailed to integrate RESs to the grid to comply with the grid frequency and voltage requirements. Due to the high penetration of RESs, especially with elevated power levels, high-power converters are needed, which necessitates higher voltage and current ratings of the semiconductor devices. The unavailability of high voltage semiconductor devices has directed the attention to the use of either series connection of semiconductor devices or Multilevel Inverters (MLIs). MLIs allow using several low rated semiconductors to hold the high output power of the inverter. The MLI output waveform is close to sinusoidal in nature, therefore it may require a small filter to enhance the output power quality. There are many types of MLIs, where the most common MLIs are Flying Capacitor, Diode Clamped, and Modular Multilevel Cascaded Converter (MMCC). The MMCC can be classified into three main formations, the Single-Star Bridge-Cells MMCC (SSBC-MMCC), the Double-Star Bridge-Cells MMCC (DSBC-MMCC), and the Double-Star Chopper-Cells MMCC (DSCC-MMCC). The main advantage of the MMCC is the modularity and scalability. In addition, the MMCC does not require any clamping diodes or flying capacitors for clamping the voltage across the switches. In this thesis, the MMCC will be used to integrate high-power RESs to Grid. Nevertheless, the high-power applications necessitate low switching frequency operations. One of the most common controlling techniques of MLI with low frequency operation is the Selective Harmonic Elimination (SHE). SHE insures also the output current Total Harmonic Distortion (THD) to be minimized. One disadvantage of the SHE method is that the complexity of the algorithm along with the equations used is increased by the increase of the MMCC number of levels. Therefore, other alternatives of SHE techniques will be studied in this work to overcome this complexity. This thesis focuses typically on MMCC, particularly the SSBC-MMCC. In this work, a high-power grid-connected SSBC-MMCC is controlled with three different SHE techniques, complying with low switching frequency operation limitation in high-power applications. In addition to the Conventional SHE (C-SHE) technique, Quasi-SHE (Q-SHE) and Asymmetrical-SHE (A-SHE) approaches are proposed and assessed. Q-SHE and A-SHE approaches are based on eliminating selected low order harmonics (for instance, eliminating the fifth and seventh order harmonics), irrelevant to the number of employed levels provided that the number of levels allows for the required harmonic elimination. Compared with the C-SHE approach, the Q-SHE and A-SHE require less computational burden in solving the required equation groups, especially when a high number of levels and/or multiple switching angles for each voltage level are needed, while maintaining the same dv/dt of the output voltage. A 5MW, 17-level, grid-connected SSBC-MMCC, controlled in the synchronous rotating reference frame, is employed for assessing the addressed SHE techniques. The assessment is validated through simulation results using Matlab/Simulink platform

Hybrid multilevel inverter using switched capacitor with boosting and self-balancing capability

Switched capacitor based multilevel inverters with boosting capability are emerging as single stage DC–AC conversion in utilizing low voltage DC sources such as solar PV and fuel cell. This paper proposes a single-phase hybrid multilevel inverter topology based on a switched capacitor that is capable of generating 9-levels along with a voltage gain of 2. The components required to construct the basic module of topology are 11 switches, 1 diode and 2 capacitors. The voltage balancing of the switched capacitors is achieved with the help of a modulation strategy, thereby eliminating the need of sensors. The theoretical loss analysis of the inverter is presented and the nearest level control based fundamental switching frequency modulation technique is employed to study the performance of the proposed inverter. The effectiveness of the suggested topology is validated with the help of a prototype built in the laboratory. The superiority of the proposed topology is assessed with the help of comparison with existing topologies

Investigations of New Fault-Tolerant Methods for Multilevel Inverters

The demands of power electronics with high power capability have increased in the last decades. These needs have driven the expansion of existing power electronics topologies and developing new power electronics generations. Multilevel inverters (MLI) are one of the most promising power electronics circuits that have been implemented and commercialized in high-voltage direct current (HVDC), motor drives, and battery energy storage systems (BESS). The expanding uses of the MLI have lead to creation of new topologies for different applications. However, one of the disadvantages of using MLIs is their complexity. MLIs consist of a large number of switching devices, which can result in a reduction of system reliability. There are significant challenges to the design of a reliable system that has the MLI’s capability with integrated fault-tolerance. In other words, design a system that can handle the fault, totally or partially, while maintaining high power capabilities and efficiency. This aim of this dissertation is to investigate the fault-tolerance of MLIs from two different points of view: 1- Develop new solutions for existing MLI topologies. In other words, add some features to existing MLIs to improve their reliability when a fault occurs. 2- Design new MLIs that have a fault-tolerant capability. A new open-circuit fault detection is proposed in this dissertation. The new fault detection method is based on monitoring the output voltage of each cell and leg voltage polarity along with each switch state. By monitoring each cell output voltage and leg voltage, the faulty cell can be detected and isolated. A novel circuit to maintain system operation under the condition of one (or more) components suffering from a faulted condition is also proposed in this dissertation. This results in a topology that continues to operate at full capability. Additionally, a new topology is proposed that offers reducing the number of batteries by 50%. Also, it has the ability to operate under non-unity power factor, which enables it to be suitable for battery energy storage systems, and static compensator (STATCOM) applications. Another novel hybrid cascaded H-bridge (CHB), known as the X-CHB, for a fault-tolerant operation is proposed in this dissertation. It ensures seamless operation of the system under an open/short circuit switching fault or dc supply fault

A generalized switched-capacitor step-up multi-level inverter employing single DC source

In this paper, a new generalized step-up multilevel DC-AC converter is proposed, which is suitable for applications with low-voltage input sources such as photovoltaic power generation and electric vehicles. This inverter can achieve a high voltage gain by controlling the series-parallel conversion of DC power supply and capacitors. Only one DC voltage source and a few power devices are employed. The maximum output voltage and the number of output levels can be further increased through the switched-capacitor unit's extension and the submodule cascaded extension. Moreover, the capacitor voltages are self-balanced without complicated voltage control circuits. The complementary operating mechanism between each pair of switches simplifies the modulation algorithm. The inductive-load ability is fully taken into account in the proposed inverter. Additionally, a remarkable characteristic of the inverter is that the charging and discharging states among different capacitors are synchronous, which reduces the voltage ripple of the frontend capacitors. The circuit structure, the working principle, the modulation strategy, the capacitors and losses analysis are presented in detail. Afterwards, the advantages of the proposed inverter are analyzed by comparing with other recently proposed inverters. Finally, the steady-state and dynamic performance of the proposed inverter is verified and validated by simulation and experiment