715 research outputs found
Available Techniques for Magnetic Hard Disk Drive Read Channel Equalization
This paper presents an extensive, non-exhaustive, study of available hard disk drive read channel equalization techniques used in the storage and readback of magnetically stored information. The physical elements and basic principles of the storage processes are introduced together with the basic theoretical definitions and models. Both read and write processes in magnetic storage are explained along with the definition of simple key concepts such as user bit density, intersymbol interference, linear and areal density, read head pulse response models, and coding algorithm
Design of adaptive analog filters for magnetic front-end read channels
Esta tese estuda o projecto e o comportamento de filtros em tempo contÃnuo de
muito-alta-frequência. A motivação deste trabalho foi a investigação de soluções de filtragem
para canais de leitura em sistemas de gravação e reprodução de dados em suporte
magnético, com custos e consumo (tamanho total inferior a 1 mm2 e consumo inferior a
1mW/polo), inferiores aos circuitos existentes. Nesse sentido, tal como foi feito neste
trabalho, o rápido desenvolvimento das tecnologias de microelectrónica suscitou esforços
muito significativos a nÃvel mundial com o objectivo de se investigarem novas técnicas
de realização de filtros em circuito integrado monolÃtico, especialmente em tecnologia
CMOS (Complementary Metal Oxide Semiconductor). Apresenta-se um estudo comparativo
a diversos nÃveis hierárquicos do projecto, que conduziu à realização e caracterização
de soluções com as caracterÃsticas desejadas.
Num primeiro nÃvel, este estudo aborda a questão conceptual da gravação e transmissão
de sinal bem como a escolha de bons modelos matemáticos para o tratamento da
informação e a minimização de erro inerente à s aproximações na conformidade aos princÃpios
fÃsicos dos dispositivos caracterizados.
O trabalho principal da tese é focado nos nÃveis hierárquicos da arquitectura do
canal de leitura e da realização em circuito integrado do seu bloco principal – o bloco de
filtragem. Ao nÃvel da arquitectura do canal de leitura, apresenta-se um estudo alargado
sobre as metodologias existentes de adaptação de sinal e recuperação de dados em suporte
magnético. Este desÃgnio aparece no âmbito da proposta de uma solução de baixo custo,
baixo consumo, baixa tensão de alimentação e baixa complexidade, alicerçada em tecnologia
digital CMOS, para a realização de um sistema DFE (Decision Feedback Equalization)
com base na igualização de sinal utilizando filtros integrados analógicos em tempo
contÃnuo.
Ao nÃvel do projecto de realização do bloco de filtragem e das técnicas de implementação
de filtros e dos seus blocos constituintes em circuito integrado, concluiu-se que
a técnica baseada em circuitos de transcondutância e condensadores, também conhecida como filtros gm-C (ou transcondutância-C), é a mais adequada para a realização de filtros
adaptativos em muito-alta-frequência. Definiram-se neste nÃvel hierárquico mais baixo,
dois subnÃveis de aprofundamento do estudo no âmbito desta tese, nomeadamente: a pesquisa
e análise de estruturas ideais no projecto de filtros recorrendo a representações no
espaço de estados; e, o estudo de técnicas de realização em tecnologia digital CMOS de
circuitos de transcondutância para a implementação de filtros integrados analógicos em
tempo contÃnuo.
Na sequência deste estudo, apresentam-se e comparam-se duas estruturas de filtros
no espaço de estados, correspondentes a duas soluções alternativas para a realização de
um igualador adaptativo realizado por um filtro contÃnuo passa-tudo de terceira ordem,
para utilização num canal de leitura de dados em suporte magnético.
Como parte constituinte destes filtros, apresenta-se uma técnica de realização de
circuitos de transcondutância, e de realização de condensadores lineares usando matrizes
de transÃstores MOSFET para processamento de sinal em muito-alta-frequência realizada
em circuito integrado usando tecnologia digital CMOS submicrométrica. Apresentam-se
métodos de adaptação automática capazes de compensar os erros face aos valores nominais
dos componentes, devidos às tolerâncias inerentes ao processo de fabrico, para os
quais apresentamos os resultados de simulação e de medição experimental obtidos.
Na sequência deste estudo, resultou igualmente a apresentação de um circuito passÃvel
de constituir uma solução para o controlo de posicionamento da cabeça de leitura
em sistemas de gravação/reprodução de dados em suporte magnético. O bloco proposto
é um filtro adaptativo de primeira ordem, com base nos mesmos circuitos de transcondutância
e técnicas de igualação propostos e utilizados na implementação do filtro adaptativo
de igualação do canal de leitura.
Este bloco de filtragem foi projectado e incluÃdo num circuito integrado (Jaguar) de
controlo de posicionamento da cabeça de leitura realizado para a empresa ATMEL em
Colorado Springs, e incluÃdo num produto comercial em parceria com uma empresa escocesa
utilizado em discos rÃgidos amovÃveis.This thesis studies the design and behavior of continuous-time very-high-frequency
filters. The motivation of this work was the search for filtering solutions for the readchannel
in recording and reproduction of data on magnetic media systems, with costs and
consumption (total size less than 1 mm2 and consumption under 1mW/pole), lower than
the available circuits. Accordingly, as was done in this work, the rapid development of
microelectronics technology raised very significant efforts worldwide in order to investigate
new techniques for implementing such filters in monolithic integrated circuit, especially
in CMOS technology (Complementary Metal Oxide Semiconductor). We present
a comparative study on different hierarchical levels of the project, which led to the realization
and characterization of solutions with the desired characteristics.
In the first level, this study addresses the conceptual question of recording and
transmission of signal and the choice of good mathematical models for the processing of
information and minimization of error inherent in the approaches and in accordance with
the principles of the characterized physical devices.
The main work of this thesis is focused on the hierarchical levels of the architecture
of the read channel and the integrated circuit implementation of its main block - the filtering
block. At the architecture level of the read channel this work presents a comprehensive
study on existing methodologies of adaptation and signal recovery of data on
magnetic media. This project appears in the sequence of the proposed solution for a lowcost,
low consumption, low voltage, low complexity, using CMOS digital technology for
the performance of a DFE (Decision Feedback Equalization) based on the equalization of
the signal using integrated analog filters in continuous time.
At the project level of implementation of the filtering block and techniques for implementing
filters and its building components, it was concluded that the technique based
on transconductance circuits and capacitors, also known as gm-C filters is the most appropriate
for the implementation of very-high-frequency adaptive filters. We defined in
this lower level, two sub-levels of depth study for this thesis, namely: research and analysis
of optimal structures for the design of state-space filters, and the study of techniques for the design of transconductance cells in digital CMOS circuits for the implementation
of continuous time integrated analog filters.
Following this study, we present and compare two filtering structures operating in
the space of states, corresponding to two alternatives for achieving a realization of an
adaptive equalizer by the use of a continuous-time third order allpass filter, as part of a
read-channel for magnetic media devices.
As a constituent part of these filters, we present a technique for the realization of
transconductance circuits and for the implementation of linear capacitors using arrays of
MOSFET transistors for signal processing in very-high-frequency integrated circuits using
sub-micrometric CMOS technology. We present methods capable of automatic adjustment
and compensation for deviation errors in respect to the nominal values of the
components inherent to the tolerances of the fabrication process, for which we present
the simulation and experimental measurement results obtained.
Also as a result of this study, is the presentation of a circuit that provides a solution
for the control of the head positioning on recording/playback systems of data on magnetic
media. The proposed block is an adaptive first-order filter, based on the same transconductance
circuits and equalization techniques proposed and used in the implementation
of the adaptive filter for the equalization of the read channel.
This filter was designed and included in an integrated circuit (Jaguar) used to control
the positioning of the read-head done for ATMEL company in Colorado Springs, and
part of a commercial product used in removable hard drives fabricated in partnership with a Scottish company
Equalization in hard disk drive read channels
This paper presents a comprehensive non-exhaustive comparative study of hard disk drive read-channel equalization techniques used in the readback process of magnetically stored information. The main read channel architectures: partial-response maximum likelihood (PRML) and decision feedback equalization (DFE) based systems, are compared in power consumption, layout area, data signalling rate and data density. This work focuses on the key component of the read channel, presenting a continuous-time analog solution for the pulse-slimming equalizer capable of reducing power consumption and die area by a factor of ten, whilst showing equivalent response to a FIR filter implementation.info:eu-repo/semantics/acceptedVersio
Equalization in hard disk drive read channels
This paper presents a comprehensive non-exhaustive comparative study of hard disk drive read-channel equalization techniques used in the readback process of magnetically stored information. The main read channel architectures: partial-response maximum likelihood (PRML) and decision feedback equalization (DFE) based systems, are compared in power consumption, layout area, data signalling rate and data density. This work focuses on the key component of the read channel, presenting a continuous-time analog solution for the pulse-slimming equalizer capable of reducing power consumption and die area by a factor of ten, whilst showing equivalent response to a FIR filter implementation
Enhanced coding, clock recovery and detection for a magnetic credit card
Merged with duplicate record 10026.1/2299 on 03.04.2017 by CS (TIS)This thesis describes the background, investigation and construction of a system
for storing data on the magnetic stripe of a standard three-inch plastic credit
in: inch card. Investigation shows that the information storage limit within a 3.375 in
by 0.11 in rectangle of the stripe is bounded to about 20 kBytes. Practical issues
limit the data storage to around 300 Bytes with a low raw error rate: a four-fold
density increase over the standard. Removal of the timing jitter (that is prob-'
ably caused by the magnetic medium particle size) would increase the limit to
1500 Bytes with no other system changes. This is enough capacity for either a
small digital passport photograph or a digitized signature: making it possible
to remove printed versions from the surface of the card.
To achieve even these modest gains has required the development of a new
variable rate code that is more resilient to timing errors than other codes in its
efficiency class. The tabulation of the effects of timing errors required the construction
of a new code metric and self-recovering decoders. In addition, a new
method of timing recovery, based on the signal 'snatches' has been invented to
increase the rapidity with which a Bayesian decoder can track the changing velocity
of a hand-swiped card. The timing recovery and Bayesian detector have
been integrated into one computation (software) unit that is self-contained and
can decode a general class of (d, k) constrained codes. Additionally, the unit has
a signal truncation mechanism to alleviate some of the effects of non-linear distortion
that are present when a magnetic card is read with a magneto-resistive
magnetic sensor that has been driven beyond its bias magnetization.
While the storage density is low and the total storage capacity is meagre in
comparison with contemporary storage devices, the high density card may still
have a niche role to play in society. Nevertheless, in the face of the Smart card its
long term outlook is uncertain. However, several areas of coding and detection
under short-duration extreme conditions have brought new decoding methods
to light. The scope of these methods is not limited just to the credit card
- …