Limit-cycle free digitally controlled power converter

The work describe an innovative technique intended to increase the resolution of the digital pulse width modulator (DPWM) for limit cycle oscillation (LCO) free operation. More precisely, the novel Dyadic Digital PWM (DDPWM) is adopted as a systematic approach to achieve accurate LCO-free operation in a digital control converter at negligible cost by effectively increasing the resolution of DPWM. The method is analysed and experimentally evaluated

Comparative Analysis among DSP and FPGA-based Control Capabilities in PWM Power Converters

PWM power converters are close to be mature for standard diffusion. New FPGA technologies could now realise at best the digital control key-points: flexible performance and time to market. The paper deals with the new digital control properties of FPGA-based techniques. On the basis of reference structures, a comparative analysis is carried-out trading-off dynamic performances and immunity to PWM environment. All possible sampled control or DSP techniques are firstly analysed and compared to each other. A breakthrough concept for FPGAs is defined, definitely solving for PWM feedback immunity by practical over-sampling and parallel processing while improving dynamic performances. Simulation tests and the application of dead-beat control clearly point-out the respective dynamic properties

Variation Resilient Adaptive Controller for Subthreshold Circuits

Subthreshold logic is showing good promise as a viable ultra-low-power circuit design technique for power-limited applications. For this design technique to gain widespread adoption, one of the most pressing concerns is how to improve the robustness of subthreshold logic to process and temperature variations. We propose a variation resilient adaptive controller for subthreshold circuits with the following novel features: new sensor based on time-to-digital converter for capturing the variations accurately as digital signatures, and an all-digital DC-DC converter incorporating the sensor capable of generating an operating operating Vdd from 0V to 1.2V with a resolution of 18.75mV, suitable for subthreshold circuit operation. The benefits of the proposed controller is reflected with energy improvement of up to 55% compared to when no controller is employed. The detailed implementation and validation of the proposed controller is discussed

On abolishing symmetry requirements in the formulation of a five-level selective harmonic elimination pulse-width modulation technique

Selective harmonic elimination pulse width modulation (SHE-PWM) techniques offer a tight control of the harmonic spectrum of a given voltage waveform generated by a power electronic converter along with a low number of switching transitions. These optimal switching transitions can be calculated through Fourier theory, and for a number of years quarter-wave and half-wave symmetries have been assumed when formulating the problem. It was shown recently that symmetry requirements can be relaxed as a constraint. This changes the way the problem is formulated, and different solutions can be found without a compromise. This letter reports solutions to the switching transitions of a five-level SHE-PWM when both the quarter- and half-wave symmetry are abolished. Only the region of high-modulation indices is reported since the low-modulation indices region requires a unipolar waveform to be realized. Selected simulation and experimental results are reported to show the effectiveness of the proposed method

The Essential Role and the Continuous Evolution of Modulation Techniques for Voltage-Source Inverters in the Past, Present, and Future Power Electronics

The cost reduction of power-electronic devices, the increase in their reliability, efficiency, and power capability, and lower development times, together with more demanding application requirements, has driven the development of several new inverter topologies recently introduced in the industry, particularly medium-voltage converters. New more complex inverter topologies and new application fields come along with additional control challenges, such as voltage imbalances, power-quality issues, higher efficiency needs, and fault-tolerant operation, which necessarily requires the parallel development of modulation schemes. Therefore, recently, there have been significant advances in the field of modulation of dc/ac converters, which conceptually has been dominated during the last several decades almost exclusively by classic pulse-width modulation (PWM) methods. This paper aims to concentrate and discuss the latest developments on this exciting technology, to provide insight on where the state-of-the-art stands today, and analyze the trends and challenges driving its future

Column-row addressing of thermo-optic phase shifters for controlling large silicon photonic circuits

We demonstrate a time-multiplexed row-column addressing scheme to drive thermo-optic phase shifters in a silicon photonic circuit. By integrating a diode in series with the heater, we can connect $N \times M$ heaters in an matrix topology to $N$ row and $M$ column lines. The heaters are digitally driven with pulse-width modulation, and time-multiplexed over different channels. This makes it possible to drive the circuit without digital-to-analog converters, and using only $M+N$ wires. We demonstrate this concept with a $1 \times 16$ power splitter tree with 15 thermo-optic phase shifters that are controlled in a $3 \times 5$ matrix, connected through 8 bond pads. This technique is especially useful in silicon photonic circuits with many tuners but limited space for electrical connections

New Modulation Technique to Mitigate Common Mode Voltage Effects in Star-Connected Five-Phase AC Drives

Star-connected multiphase AC drives are being considered for electromovility applications such as electromechanical actuators (EMA), where high power density and fault tolerance is demanded. As for three-phase systems, common-mode voltage (CMV) is an issue for multiphase drives. CMV leads to shaft voltages between rotor and stator windings, generating bearing currents which accelerate bearing degradation and produce high electromagnetic interferences (EMI). CMV effects can be mitigated by using appropriate modulation techniques. Thus, this work proposes a new Hybrid PWM algorithm that effectively reduces CMV in five-phase AC electric drives, improving their reliability. All the mathematical background required to understand the proposal, i.e., vector transformations, vector sequences and calculation of analytical expressions for duty cycle determination are detailed. Additionally, practical details that simplify the implementation of the proposal in an FPGA are also included. This technique, HAZSL5M5-PWM, extends the linear range of the AZSL5M5-PWM modulation, providing a full linear range. Simulation results obtained in an accurate multiphase EMA model are provided, showing the validity of the proposed modulation approach.This work has been supported in part by the Government of the Basque Country within the fund for research groups of the Basque University system IT978-16 and in part by the Government of the Basque Country within the research program ELKARTEK as the project ENSOL (KK-2018/00040)

A novel space-vector algorithm for multilevel converters based on geometrical considerations using a new sequence control technique

his paper presents a fast and simple space vector modulation algorithm for voltage source multilevel converters for calculating the switching times and the space vectors using simple geometrical considerations. This method provides the nearest switching vectors sequence to the reference vector and calculates the on-state durations of the respective switching state vectors without involving trigonometric functions, look-up tables or coordinate system transformations which increase the computational load corresponding to the modulation of a multilevel converter. The low computational cost of the proposed method is always the same and it is independent of the number of levels of the converter. In addition, a new switching sequence control technique is presented for reducing the ripple of the DC-link voltage approximately in 66%