An Event-Based Synchronization Framework for Controller Hardware-in-the-loop Simulation of Electric Railway Power Electronics Systems

The Controller Hardware_in_the_loop (CHIL) simulation is gaining popularity as a cost_effective, efficient, and reliable tool in the design and development process of fast_growing electrified transportation power converters. However, it is challenging to implement the conventional CHIL simulations on the railway power converters with complex topologies and high switching frequencies due to strict real_time constraints. Therefore, this paper proposes an event-based synchronization CHIL (ES_CHIL) framework for high_fidelity simulation of these electrified railway power converters. Different from conventional CHIL simulations synchronized through the time axis, the ES_CHIL framework is synchronized through the event axis. Therefore, it can ease the real_time constraint and broaden the upper bound on the system size and switching frequency. Besides, models and algorithms with higher accuracy, such as the diode model with natural commutation processes, can be used in the ES-CHIL framework. The proposed framework is validated for a 350 kW wireless power transformer system containing 24 fully controlled devices and 36 diodes by comparing it with Simulink and physical experiments. This research improves the fidelity and application range of the power converters CHIL simulation. Thus, it helps to accelerate the prototype design and performance evaluation process for electrified railways and other applications with such complex converters

FPGA-based High Performance Diagnostics For Fusion

High performance diagnostics are an important aspect of fusion research. Increasing shot-lengths paired with the requirement for higher accuracy and speed make it mandatory to employ new technology to cope with the increasing demands on digitization and data handling. Field programmable gate arrays (FPGAs) are well known in high performance applications. Their ability to handle multiple fast data streams whilst remaining programmable make them an ideal tool for diagnostic development. Both the improvement of old and the design of new diagnostics can benefit from FPGA-technology and increase the amount of accessible physics significantly. In this work the developments on two FPGA-based diagnostics are presented. In the first part a new open-hardware low-cost FPGA-based digitizer is presented for the MAST-Upgrade (MAST-U) integral electron density interferometer. The system is shown to have an optically limited phase accuracy and a detection bandwidth of over 3.5 MHz. Data is acquired continuously at 20 MS/s and streamed to an acquisition PC via optical fiber. By employing a dual-FPGA approach real-time processing of the density signal can be achieved despite severly limited resources, thus providing a control signal for the MAST-U plasma control system system with less than 8 μs latency. Due to MAST-U being still inoperable, in-situ testing has been conducted on the ASDEX Upgrade, where fast wave physics up to 3.5 MHz could first be observed. The second part presents developments to the Synthetic Aperture Microwave Imaging (SAMI) diagnostic. In addition to improving the utilization of long shot-lengths and enabling dual-polarized acquisition the system has been enhanced to continuously acquire active probing profiles for 2D Doppler back-scattering (DBS), a technique recently developed using SAMI. The aim is to measure pitch angle profiles to derive the edge current density. SAMI has been transferred to the NSTX-Upgrade and integrated into the experiment’s infrastructure, where it has been acquiring data since May 2016. As part of this move an investigation into near-field effects on SAMI’s image reconstruction algorithms was conducted

Multi-rate real-time simulation of modular multilevel converter using CPU and FPGA

This thesis presents the real-time simulation of a modular multilevel converter (MMC) using Field Programmable Gates Array (FPGA). Undertaking such a project raises challenges due to the very high number of components in MMC. The choice of the hardware used is justified by this particular problematic. Using FPGA, a very large number of inputs and outputs can be easily managed. By simulating the converter on FPGA reduces latency and the delays between the IOs and the MMC. It also allows using very small time-step ensuring accuracy for pulses detection. Only the converter is simulated on FPGA and the remaining component of the simulation, such as the AC system and its distribution network are simulated on CPU. Doing so gives the user access to large library of component from commercial software. Using two distinct platforms, CPU and FPGA, then requires the model not only to be decoupled, but also to use different sampling time. This thesis debuts by a presentation of the problematic. Then, the required sampling time for accurate simulation of MMC is demonstrated. In order to achieve such a small time-step, a decoupling method and its validation is proposed. The method is then generalized and applied to multi-rate simulation. Using those methods, a details implementation of the converter, using OPAL-RT technologies real-time simulator, is given. Finally, numerical and experimental validation of this model are presented

Integration of Flywheel Energy Storage Systems in Low Voltage Distribution Grids

A Flywheel Energy Storage System (FESS) can rapidly inject or absorb high amounts of active power in order to support the grid, following abrupt changes in the generation or in the demand, with no concern over its lifetime. The work presented in this book studies the grid integration of a high-speed FESS in low voltage distribution grids from several perspectives, including optimal allocation, sizing, modeling, real-time simulation, and Power Hardware-in-the-Loop testing

Integration of Flywheel Energy Storage Systems in Low Voltage Distribution Grids

Mit dem Ziel, den Stromsektor zu dekarbonisieren und dem Klimawandel zu begegnen, steigt der Anteil erneuerbarer Energieressourcen in den Energiesystemen rund um den Globus kontinuierlich an. Aufgrund des intermittierenden Charakters dieser Ressourcen kann die Aufrechterhaltung des momentanen Gleichgewichts zwischen Erzeugung und Verbrauch und damit der Netzfrequenz ohne angemessene Maßnahmen jedoch eine Herausforderung darstellen. Da erneuerbare Energiequellen mit Umrichterschnittstellen dem System selbst keine Trägheit verleihen, nimmt gleichzeitig die kumulative Systemträgheit ab, was zu schnelleren Änderungen der Netzfrequenz und Bedenken hinsichtlich der Netzstabilität führt. Ein Schwungrad-Energiespeichersystem (Flywheel Energy Storage System, FESS) kann schnell große Leistungsmengen einspeisen oder aufnehmen, um das Netz nach einer abrupten Änderung der Erzeugung oder des Verbrauchs zu unterstützen. Neben der schnellen Reaktionszeit hat ein FESS den Vorteil einer hohen Leistungsdichte und einer großen Anzahl von Lade- und Entladezyklen ohne Kapazitätsverlust während seiner gesamten Lebensdauer. Diese Eigenschaften machen das FESS zu einem gut geeigneten Kandidaten für die Frequenzstabilisierung des Netzes oder die Glättung kurzfristiger Leistungsschwankungen auf lokaler Ebene. In dieser Dissertation wird die Netzintegration eines Hochgeschwindigkeits-FESS auf der Niederspannungsebene aus mehreren Perspektiven untersucht. Zunächst wird das Problem der Platzierung und Dimensionierung eines FESS in Niederspannungsverteilnetzen für Leistungsglättungsanwendungen behandelt. Um den am besten geeigneten Standort für ein FESS zu finden, wird eine datengetriebene Methode zur Abschätzung der relativen Spannungsempfindlichkeit vorgestellt, die auf dem Konzept der Transinformation basiert. Der Hauptvorteil der vorgeschlagenen Methode besteht darin, dass sie kein Netzmodell erfordert und nur Messwerte an den interessierenden Punkten verwendet. Messergebnisse aus einem realen Netz in Süddeutschland zeigen, dass mit dem vorgeschlagenen Ansatz die Netzanschlusspunkte mit einer höheren Spannungsempfindlichkeit gegenüber Wirkleistungsänderungen, welche am meisten von einem durch FESS ermöglichten, glatteren Leistungsprofil profitieren können, erfolgreich zugeordnet werden können. Darüber hinaus wird eine neue Methode zur Dimensionierung von Energiespeichersystemen unter Verwendung von Messdaten eingeführt. Der vorgeschlagene Ansatz erkennt wiederkehrende Verbrauchsmuster in aufgezeichneten Leistungsprofilen mit Hilfe des "Motif Discovery"-Algorithmus, die dann zur Dimensionierung verschiedener Speichertechnologien, einschließlich eines FESS, verwendet werden. Anhand von gesammelten Messdaten aus mehreren Niederspannungsnetzen in Deutschland wird gezeigt, dass die Speichersysteme mit den aus den detektierten Mustern abgeleiteten Charakteristika während der gesamten Messperiode effektiv für ihre Anwendungen genutzt werden können. Als nächstes wurde ein dynamisches Modell eines Hochgeschwindigkeits-FESS entwickelt und mit experimentellen Ergebnissen in mehreren Szenarien, unter Berücksichtigung der Verluste und des Hilfsenergiebedarfs des Systems, validiert. In den untersuchten Szenarien wurde eine maximale Differenz von nur 0,8 % zwischen dem Ladezustand des Modells und dem realen FESS beobachtet, was die Genauigkeit des entwickelten Modells beschreibt. Nach Festlegung des erforderlichen Aufbaus wurde die Leistungsfähigkeit eines 60 kW Hochgeschwindigkeits-FESS während mehrerer Frequenzabweichungsszenarien mit Hilfe von Power Hardware-in-the-Loop-Tests beurteilt. Die Ergebnisse der PHIL-Tests zeigen, dass das Hochgeschwindigkeits-FESS sehr schnell nach einer plötzlichen Frequenzabweichung reagiert und in knapp 60 ms die erforderliche Leistung erreicht, wobei die neuesten Anforderungen der Anwendungsregeln für die Frequenzunterstützung auf der Niederspannungsebene erfüllt werden. Um schließlich die Vorteile des schnellen Verhaltens des FESS für Energiesysteme mit geringer Trägheit zu demonstrieren, wurde ein neuartiger adaptiver Trägheits-Emulationsregler für das Hochgeschwindigkeits-FESS eingeführt und seine Leistung in einem Microgrid mit geringer Trägheit durch Simulationen und Experimente validiert. Die Simulationsergebnisse zeigen, dass die Verwendung des FESS mit dem vorgeschlagenen Trägheits-Emulationsregler die maximale Änderungsrate der Frequenz um 28 % und die maximale Frequenzabweichung um 44 % während der Inselbildung des untersuchten Microgrid reduzieren kann und mehrere zuvor vorgestellte adaptive Regelungskonzepte übertrifft. Der vorgeschlagene Regler wurde auch auf einem realen 60 kW FESS mit dem Konzept des Rapid Control Prototyping implementiert, und die Leistungsfähigkeit des FESS mit dem neuen Regelungsentwurf wurde mit Hilfe von PHIL-Tests des FESS validiert. Die PHIL-Ergebnisse, die die allererste experimentelle Validierung der Trägheitsemulation mit einem FESS darstellen, bestätigen die Simulationsergebnisse und zeigen die Vorteile des vorgeschlagenen Reglers

Real-time FPGA-based co-simulation of large scale power systems

With the rapid increase of size and complexity of modem electrical power systems, 1) the simulation accuracy and 2) the capability of simulating large power systems have become two conflicting objectives. This thesis proposes a novel FPGA-RTDS co-simulator to meet these two objectives. As the basis of the co-simulator, a library of power system components is developed in FPGA, including the most commonly used power system elements and control systems. The proposed cosimulator combines the advantages of 1) the paralleled architecture, high logic density and high clock speed from FPGA and 2) better modelling flexibility and user-friendly GUI from RTDS together. Multi-FPGA structure is introduced to further improve the simulation capability for large power systems. The use of detailed EMT models in the whole system guarantees the accuracy of simulation and eliminates the potential interface error. Deeply pipelined and massively paralleled algorithms have been designed to maximize time and hardware efficiency. The modular design significantly improves the system expandability. Case studies including large scale power system with more than 4000 nodes are presented to demonstrate the simulation capability. Comparisons are made with SIMULINK and RTDS to verify the accuracy of the proposed co-simulator

Development of FPGA controlled diagnostics on the MAST fusion reactor

Field Programmable Gate Array technology (FPGA) is very useful for implementing high performance digital signal processing algorithms, data acquisition and real-time control on nuclear fusion devices. This thesis presents the work done using FPGAs to develop powerful diagnostics. This has been achieved by developing embedded Linux and running it on the FPGA to enhance diagnostic capabilities such as remote management, PLC communications over the ModBus protocol and UDP based ethernet streaming. A closed loop real-time feedback prototype has been developed for combining laser beams onto a single beam path, for improving overall repetition rates of Thomson Scattering systems used for plasma electron temperature and density radial profile measurements. A controllable frequency sweep generator is used to drive the Toroidal Alfven Eigenmode (TAE) antenna system and results are presented indicating successful TAE resonance detection. A fast data acquisition system has been developed for the Electron Bernstein Wave (EBW) Synthetic Aperture Microwave Imaging system and an active probing microwave source where the FPGA clock rate has been pushed to the maximum. Propagation delays on the order of 2 nanoseconds in the FPGA have been finely tuned with careful placement of FPGA logic using a custom logic placement tool. Intensity interferometry results are presented on the EBW system with a suggestion for phase insensitive pitch angle measurement

Integration of Flywheel Energy Storage Systems in Low Voltage Distribution Grids

A Flywheel Energy Storage System (FESS) can rapidly inject or absorb high amounts of active power in order to support the grid, following abrupt changes in the generation or in the demand, with no concern over its lifetime. The work presented in this book studies the grid integration of a high-speed FESS in low voltage distribution grids from several perspectives, including optimal allocation, sizing, modeling, real-time simulation, and Power Hardware-in-the-Loop testing

NASA Tech Briefs, January 2013

Topics include: Single-Photon-Sensitive HgCdTe Avalanche Photodiode Detector; Surface-Enhanced Raman Scattering Using Silica Whispering-Gallery Mode Resonators; 3D Hail Size Distribution Interpolation/Extrapolation Algorithm; Color-Changing Sensors for Detecting the Presence of Hypergolic Fuels; Artificial Intelligence Software for Assessing Postural Stability; Transformers: Shape-Changing Space Systems Built with Robotic Textiles; Fibrillar Adhesive for Climbing Robots; Using Pre-Melted Phase Change Material to Keep Payloads in Space Warm for Hours without Power; Development of a Centrifugal Technique for the Microbial Bioburden Analysis of Freon (CFC-11); Microwave Sinterator Freeform Additive Construction System (MS-FACS); DSP/FPGA Design for a High-Speed Programmable S-Band Space Transceiver; On-Chip Power-Combining for High-Power Schottky Diode-Based Frequency Multipliers; FPGA Vision Data Architecture; Memory Circuit Fault Simulator; Ultra-Compact Transputer-Based Controller for High-Level, Multi-Axis Coordination; Regolith Advanced Surface Systems Operations Robot Excavator; Magnetically Actuated Seal; Hybrid Electrostatic/Flextensional Mirror for Lightweight, Large-Aperture, and Cryogenic Space Telescopes; System for Contributing and Discovering Derived Mission and Science Data; Remote Viewer for Maritime Robotics Software; Stackfile Database; Reachability Maps for In Situ Operations; JPL Space Telecommunications Radio System Operating Environment; RFI-SIM: RFI Simulation Package; ION Configuration Editor; Dtest Testing Software; IMPaCT - Integration of Missions, Programs, and Core Technologies; Integrated Systems Health Management (ISHM) Toolkit; Wind-Driven Wireless Networked System of Mobile Sensors for Mars Exploration; In Situ Solid Particle Generator; Analysis of the Effects of Streamwise Lift Distribution on Sonic Boom Signature; Rad-Tolerant, Thermally Stable, High-Speed Fiber-Optic Network for Harsh Environments; Towed Subsurface Optical Communications Buoy; High-Collection-Efficiency Fluorescence Detection Cell; Ultra-Compact, Superconducting Spectrometer-on-a-Chip at Submillimeter Wavelengths; UV Resonant Raman Spectrometer with Multi-Line Laser Excitation; Medicine Delivery Device with Integrated Sterilization and Detection; Ionospheric Simulation System for Satellite Observations and Global Assimilative Model Experiments - ISOGAME; Airborne Tomographic Swath Ice Sounding Processing System; flexplan: Mission Planning System for the Lunar Reconnaissance Orbiter; Estimating Torque Imparted on Spacecraft Using Telemetry; PowderSim: Lagrangian Discrete and Mesh-Free Continuum Simulation Code for Cohesive Soils; Multiple-Frame Detection of Subpixel Targets in Thermal Image Sequences; Metric Learning to Enhance Hyperspectral Image Segmentation; Basic Operational Robotics Instructional System; Sheet Membrane Spacesuit Water Membrane Evaporator; Advanced Materials and Manufacturing for Low-Cost, High-Performance Liquid Rocket Combustion Chambers; Motor Qualification for Long-Duration Mars Missions

Opérateurs et engins de calcul en virgule flottante et leur application à la simulation en temps réel sur FPGA

RÉSUMÉ La simulation en temps réel des réseaux électriques connaît un vif intérêt industriel, motivé par la réduction substantielle des coûts de développement qu'offre une telle approche de prototypage. Ainsi, la simulation en temps réel permet d'intégrer dans la boucle de la simulation du matériel au fur et à mesure sa conception, permettant du même coup d'en vérifier le bon fonctionnement dans des conditions réalistes. Néanmoins, la simulation en temps réel au moyen de CPU, telle qu'elle a été pensée depuis une quinzaine d'années, souffre de certaines limitations, notamment dans l'atteinte de pas de calcul de l'ordre de quelques micro-secondes, un requis important pour la simulation fidèle des transitoires rapides qu'exigent les convertisseurs de puissance modernes. Pour tenter d'apporter une réponse à ces difficultés, les industriels ont adopté les circuits FPGA pour la réalisation d'engins de calcul dédiés à la simulation rapide des réseaux électriques, ce qui a permis de franchir la barrière de la fréquence de commutation de 5 kHz qui était caractéristique de la simulation sur CPU. La simulation sur FPGA offre à ce titre différents avantages telle que la réduction de la latence de la boucle de simulation du matériel sous test, particulièrement du fait que le FPGA donne un accès direct aux senseurs et aux actuateurs du dispositif en cours de prototypage. Les paradigmes usuels du traitement de signal sur FPGA font qu'il est d'usage d'y opérer une arithmétique à virgule fixe. Ce format des nombres pénalise le temps de développement puisqu'il requiert du concepteur une évaluation complexe de la précision nécessaire pour représenter l'ensemble des variables du modèle mathématique. C'est pourquoi l'arithmétique à virgule flottante suscite un certain intérêt dans la simulation des réseaux sur FPGA. Cependant, les opérateurs en virgule flottante imposent de longues latences, particulièrement handicapantes dans la réalisation de lois d'intégration (trapézoïdale, Euler-arrière, etc.) pour lesquelles l'utilisation d'un accumulateur à un cycle est cruciale. En cela, la problématique de l'addition et de l'accumulation en virgule flottante forme le cœur de notre travail de recherche. Ce travail a permis l'élaboration des architectures d'accumulateurs, de multiplieurs accumulateurs (MAC) et d'opérateurs de produit scalaire (OPS) en virgule flottante, qui joueront un rôle déterminant dans la mise en œuvre de nos engins de calcul pour la simulation des réseaux électriques. Ainsi, le travail présenté dans cette thèse propose différentes contributions scientifiques au domaine de la simulation en temps réel sur FPGA. D'une part, il contribue à la formulation d'un algorithme de sommation qui est une généralisation de la technique d'auto-alignement, nantie ici d'une formulation et d'une réalisation matérielle simplifiées. Le travail établit les critères permettant de garantir la bonne exactitude des résultats, critères que nous avons établis par des démonstrations théoriques et empiriques. La thèse propose également une analyse exhaustive de l'utilisation du format redondant high radix carry-save (HRCS) dans l'addition de mantisses larges, format pour lequel deux nouveaux opérateurs arithmétiques sont proposés: un additionneur endomorphique ainsi qu'un convertisseur HRCS à conventionnel. Une fois l'addition en virgule flottante à un cycle réalisée, la thèse propose de concevoir sur FPGA des engins de calcul exploitant une architecture SIMD (single instruction, multiple data) et disposant de plusieurs MAC ou opérateurs de produit scalaire (OPS) en virgule flottante. Ces opérateurs présentent une latence très courte, permettant l'atteinte de pas de calcul de quelques centaines de nanosecondes dans la simulation de convertisseurs de puissance de moyenne complexité.----------ABSTRACT The real-time simulation of electrical networks gained a vivid industrial interest during recent years, motivated by the substantial development cost reduction that such a prototyping approach can offer. Real-time simulation allows the progressive inclusion of real hardware during its development, allowing its testing under realistic conditions. However, CPU-based simulations suffer from certain limitations such as the difficulty to reach time-steps of a few microsecond, an important challenge brought by modern power converters. Hence, industrial practitioners adopted the FPGA as a platform of choice for the implementation of calculation engines dedicated to the rapid real-time simulation of electrical networks. The reconfigurable technology broke the 5~kHz switching frequency barrier that is characteristic of CPU-based simulations. Moreover, FPGA-based real-time simulation offers many advantages, including the reduced latency of the simulation loop that is obtained thanks to a direct access to sensors and actuators. The fixed-point format is paradigmatic to FPGA-based digital signal processing. However, the format imposes a time penalty in the development process since the designer has to asses the required precision for all model variables. This fact brought an import research effort on the use of the floating-point format for the simulation of electrical networks. One of the main challenges in the use of the floating-point format are the long latencies required by the elementary arithmetic operators, particularly when an adder is used as an accumulator, an important building block for the implementation of integration rules such as the trapezoidal method. Hence, single-cycle floating-point accumulation forms the core of this research work. Our results help building such operators as accumulators, multiply-accumulators (MACs), and dot-product (DP) operators. These operators play a key role in the implementation of the proposed calculation engines. Therefore, this thesis contributes to the realm of FPGA-based real-time simulation in many ways. The research work proposes a new summation algorithm, which is a generalization of the so-called self-alignment technique. The new formulation is broader, simpler in its expression and hardware implementation. Our research helps formulating criteria to guarantee good accuracy, the criteria being established on a theoretical, as well as empirical basis. Moreover, the thesis offers a comprehensive analysis on the use of the redundant high radix carry-save (HRCS) format. The HRCS format is used to perform rapid additions of large mantissas. Two new HRCS operators are also proposed, namely an endomorphic adder and a HRCS to conventional converter. Once the mean to single-cycle accumulation is defined as a combination of the self-alignment technique and the HRCS format, the research focuses on the FPGA implementation of SIMD calculation engines using parallel floating-point MACs or DPs. The proposed operators are characterized by low latencies, allowing the engines to reach very low time-steps. The document finally discusses power electronic circuits modelling, and concludes with the presentation of a versatile calculation engine capable of simulating power converter with arbitrary topologies and up to 24 switches, while achieving time steps below 1 μs and allowing switching frequencies in the range of tens kilohertz