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Genetic algorithm approach to find the best input variable partitioning
Conference PaperThis paper presents a variable partition algorithm which combines the quasi-reduced ordered multiple-terminal multiple-valued decision diagrams and genetic algorithms (GAs). The algorithm is better than the previous techniques which find a good functional decomposition by non-exhaustive search and expands the range of searching for the best decomposition providing the optimal subtable multiplicity. The possible solutions are evaluated using the gain of decomposition for a multiple-output multiple-valued logic function. The distinct feature of GA is the possible solutions being coded by real numbers. Here the simplex-based crossover is proposed to use for the recombination stage of GA. It permits to increase the GA coverag
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Combinational multiple-valued circuit design by generalised disjunctive decomposition
A design of multiple-valued circuits based on the multiple-valued programmable logic arrays (MV PLA’s) by generalized disjunctive decomposition is presented. Main subjects are 1) Generalized disjunctive decomposition of multiple-valued functions using multiple-terminal multiplevalued decision diagrams (MTMDD’s); 2) Realization of functions by MV PLA-based combinatorial circuits
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Time complexity analysis of generalized decomposition algorithm
The time complexity of the fast algorithm for generalized disjunctive decomposition of an rvalued function is studied.The considered algorithm to find the best decomposition is based on the analysis of multiple-terminal multiple-valued decision diagrams. It is shown that the time complexity for random rvalued functions depends on the such restriction as the number n1 of inputs in the first level circuit. In the case where the best partition of input variables is searched with restriction the time complexity is reduced in several times. The algorithm was simulated on a digital computer. The experimental results are in agreement with the theoretical predictions
Low-Complexity Quantized Switching Controllers using Approximate Bisimulation
In this paper, we consider the problem of synthesizing low-complexity
controllers for incrementally stable switched systems. For that purpose, we
establish a new approximation result for the computation of symbolic models
that are approximately bisimilar to a given switched system. The main advantage
over existing results is that it allows us to design naturally quantized
switching controllers for safety or reachability specifications; these can be
pre-computed offline and therefore the online execution time is reduced. Then,
we present a technique to reduce the memory needed to store the control law by
borrowing ideas from algebraic decision diagrams for compact function
representation and by exploiting the non-determinism of the synthesized
controllers. We show the merits of our approach by applying it to a simple
model of temperature regulation in a building
Discrete Function Representations Utilizing Decision Diagrams and Spectral Techniques
All discrete function representations become exponential in size in the worst case. Binary decision diagrams have become a common method of representing discrete functions in computer-aided design applications. For many functions, binary decision diagrams do provide compact representations. This work presents a way to represent large decision diagrams as multiple smaller partial binary decision diagrams. In the Boolean domain, each truth table entry consisting of a Boolean value only provides local information about a function at that point in the Boolean space. Partial binary decision diagrams thus result in the loss of information for a portion of the Boolean space. If the function were represented in the spectral domain however, each integer-valued coefficient would contain some global information about the function. This work also explores spectral representations of discrete functions, including the implementation of a method for transforming circuits from netlist representations directly into spectral decision diagrams
Synthesis and Optimization of Reversible Circuits - A Survey
Reversible logic circuits have been historically motivated by theoretical
research in low-power electronics as well as practical improvement of
bit-manipulation transforms in cryptography and computer graphics. Recently,
reversible circuits have attracted interest as components of quantum
algorithms, as well as in photonic and nano-computing technologies where some
switching devices offer no signal gain. Research in generating reversible logic
distinguishes between circuit synthesis, post-synthesis optimization, and
technology mapping. In this survey, we review algorithmic paradigms ---
search-based, cycle-based, transformation-based, and BDD-based --- as well as
specific algorithms for reversible synthesis, both exact and heuristic. We
conclude the survey by outlining key open challenges in synthesis of reversible
and quantum logic, as well as most common misconceptions.Comment: 34 pages, 15 figures, 2 table
Advances in Functional Decomposition: Theory and Applications
Functional decomposition aims at finding efficient representations for Boolean functions. It is used in many applications, including multi-level logic synthesis, formal verification, and testing.
This dissertation presents novel heuristic algorithms for functional decomposition. These algorithms take advantage of suitable representations of the Boolean functions in order to be efficient.
The first two algorithms compute simple-disjoint and disjoint-support decompositions. They are based on representing the target function by a Reduced Ordered Binary Decision Diagram (BDD). Unlike other BDD-based algorithms, the presented ones can deal with larger target functions and produce more decompositions without requiring expensive manipulations of the representation, particularly BDD reordering.
The third algorithm also finds disjoint-support decompositions, but it is based on a technique which integrates circuit graph analysis and BDD-based decomposition. The combination of the two approaches results in an algorithm which is more robust than a purely BDD-based one, and that improves both the quality of the results and the running time.
The fourth algorithm uses circuit graph analysis to obtain non-disjoint decompositions. We show that the problem of computing non-disjoint decompositions can be reduced to the problem of computing multiple-vertex dominators. We also prove that multiple-vertex dominators can be found in polynomial time. This result is important because there is no known polynomial time algorithm for computing all non-disjoint decompositions of a Boolean function.
The fifth algorithm provides an efficient means to decompose a function at the circuit graph level, by using information derived from a BDD representation. This is done without the expensive circuit re-synthesis normally associated with BDD-based decomposition approaches.
Finally we present two publications that resulted from the many detours we have taken along the winding path of our research
An overview of decision table literature 1982-1995.
This report gives an overview of the literature on decision tables over the past 15 years. As much as possible, for each reference, an author supplied abstract, a number of keywords and a classification are provided. In some cases own comments are added. The purpose of these comments is to show where, how and why decision tables are used. The literature is classified according to application area, theoretical versus practical character, year of publication, country or origin (not necessarily country of publication) and the language of the document. After a description of the scope of the interview, classification results and the classification by topic are presented. The main body of the paper is the ordered list of publications with abstract, classification and comments.
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