A Silicon Carbide Power Management Solution for High Temperature Applications

The increasing demand for discrete power devices capable of operating in high temperature and high voltage applications has spurred on the research of semiconductor materials with the potential of breaking through the limitations of traditional silicon. Gallium nitride (GaN) and silicon carbide (SiC), both of which are wide bandgap materials, have garnered the attention of researchers and gradually gained market share. Although these wide bandgap power devices enable more ambitious commercial applications compared to their silicon-based counterparts, reaching their potential is contingent upon developing integrated circuits (ICs) capable of operating in similar environments. The foundation of any electrical system is the ability to efficiently condition and supply power. The work presented in this thesis explores integrated SiC power management solutions in the form of linear regulators and switched capacitor converters. While switched-mode converters provide high efficiency, the requirement of an inductor hinders the development of a compact, integrated solution that can endure harsh operating environments. Although the primary research motivation for wide bandgap ICs has been to provide control and protection circuitry for power devices, the circuitry designed in this work can be incorporated in stand-alone applications as well. Battery or generator powered data acquisition systems targeted towards monitoring industrial machinery is one potential usage scenario

On the Role of Power Electronics in Visible Light Communication

The continuous demand of increasing data rates provided by wireless communication systems is contributing to saturating the RF spectrum. Visible Light Communication (VLC) systems aim to alleviate this congestion by using the visible light spectrum. These systems have been proposed to make use of High-Brightness LEDs (HB-LEDs) not only for lighting, but also for transmitting information by rapidly changing the intensity of the emitted light. A critical issue is that VLC requires a fast HB-LED driver in order to reproduce the target light intensity waveforms, which can include components of several MHz. Consequently, the HB-LED drivers proposed to date are based on the use of an RF Power Amplifier (RFPA). These devices provide the required speed, but suffer from very high power losses. To overcome this drawback, different solutions based on the use of fast-response DC/DC converters are presented in this paper. Several DC/DC converters, either to be used instead of an RFPA or to help an RFPA to achieve high efficiency, are thus analysed. The proposed HB-LED drivers enable the implementation of VLC transmitters without sacrificing one of the most important advantages of HB-LED lighting, namely its high power efficienc

Double Resonant High-Frequency Converters for Wireless Power Transfer

This thesis describes novel techniques and developments in the design and implementation of a low power radio frequency (40kHz to 1MHz) wireless power transfer (WPT) system, with an application in the wireless charging of autonomous drones without physical connection to its on-board Battery Management System (BMS). The WPT system is developed around a matrix converter exploiting the benefits such as a small footprint (DC-link free), high efficiency and high power density. The overall WPT system topology discussed in this thesis is based on the current state-of-the-art found in literature, but enhancements are made through novel methods to further improve the converter’s stability, reduce control complexity and improve the wireless power efficiency. In this work, each part of the system is analysed and novel techniques are proposed to achieve improvements. The WPT system design methodology presented in this thesis commences with the use of a conventional full-bridge converter. For cost-efficiency and to improve the converters stability, a novel gate drive circuit is presented which provides self-generated negative bias such that a bipolar MOSFET drive can be driven without an additional voltage source or magnetic component. The switching control sequences for both a full-bridge and single phase to single phase matrix converter are analysed which show that the switching of a matrix converter can be considered to be the same as a full-bridge converter under certain conditions. A middleware is then presented that reduces the complexity of the control required for a matrix converter and enables control by a conventional full-bridge controller (i.e. linear controller or microcontroller). A novel technique that can maximise and maintain in real-time the WPT efficiency is presented using a maximum efficiency point tracking approach. A detailed study of potential issues that may affect the implementation of this novel approach are presented and new solutions are proposed. A novel wireless pseudo-synchronous sampling method is presented and implemented on a prototype system to realise the maximum efficiency point tracking approach. Finally, a new hybrid wireless phase-locked loop is presented and implemented to minimise the bandwidth requirements of the maximum efficiency point tracking approach. The performance and methods for implementation of the novel concepts introduced in this thesis are demonstrated through a number of prototypes that were built. These include a matrix converter and two full WPT systems with operating frequencies ranging from sub-megahertz to megahertz level. Moreover, the final prototype is applied to the charging of a quadcopter battery pack to successfully charge the pack wirelessly whilst actively balancing the cells. Hence, fast battery charging and cell balancing, which conventionally requires battery removal, can be achieved without re-balance the weight of the UAV

Performance Evaluation of a VLC Transmitter Based on the Split of the Power

IEEE Applied Power Electronics Conference and Exposition, San Antonio, (Estados Unidos de Norteamérica), marzo de 2018Visible Light Communication (VLC) has gained relevance during last years. It consists in using High-Brightness LEDs (HB-LEDs) both for lighting and for transmitting information changing the light intensity rapidly. However, there are some bottlenecks that are slowing down the deployment of this technology. One of the most important problems is that the HB-LED drivers proposed for addressing high data rates in VLC achieve poor power efficiency. Since these HB-LED drivers must be able to reproduce fast current waveforms, the use of Linear Power Amplifiers (LPAs) has been adopted, which clearly damage the power efficiency of HB-LED lighting. In order to alleviate this problem, a HB-LED driver made up of two DC-DC power converters is presented in this work. One of them is responsible for performing the communication functionality by operating at high switching frequency (10 MHz), whereas the second one fulfills the illumination functionality by ensuring a certain biasing point. The split of the power allows to minimize the power delivered by the fast-response DC-DC power converter. Thus, the efficiency can be maximized for scenarios with changing conditions (i.e., mobile transmitter and/or receiver, presence of mobile obstacles, etc.). In this sense, how the lighting level and the communication signal power affect both the power efficiency and the communication efficiency is deeply analyzed. The implemented prototype achieves an overall efficiency around 90%. In addition, the proposed VLC transmitter is able to reproduce a wide range of digital modulation schemes, including Orthogonal Frequency Division Multiplexing (OFDM

Efficiency improvement of LDO ouput based linear regulator with supercapacitor energy recovery - a versatile new technique with an example of a 5v to 1.5 v version

Supercapacitors are used in various industrial applications and the supercapacitors technology is gradually progressing into a mature state. Common applications of supercapacitors are in electric vehicles, hybrid electric vehicles, uninterruptible power supply (UPS) and in portable devices such as cellular phones and laptops. The capacitance values range from fractional Farads to few thousand Farads and their continuos DC voltage ratings are from 2V to 6V. At University of Waikato, a team works on using supercapacitors for improving the efficiency of linear voltage regulators. In particular, this patented technique aims at combining off the shelfs LDO ICs and a supercapacitor array for improving end to end efficiency of linear regulator. My work is aimed at developing the theoretical background and designing prototype circuitry for a voltage regulator for the case of unregulated input supply is more than 3 times of the minimum input voltage requirement of the LDO which is applicable for a 5V to 1.5V regulator. Experimental results are indicated with future suggestions for improvement

A Novel Boost Converter Based LED Driver Chip Targeting Mobile Applications

abstract: A novel integrated constant current LED driver design on a single chip is developed in this dissertation. The entire design consists of two sections. The first section is a DC-DC switching regulator (boost regulator) as the frontend power supply; the second section is the constant current LED driver system. In the first section, a pulse width modulated (PWM) peak current mode boost regulator is utilized. The overall boost regulator system and its related sub-cells are explained. Among them, an original error amplifier design, a current sensing circuit and slope compensation circuit are presented. In the second section – the focus of this dissertation – a highly accurate constant current LED driver system design is unveiled. The detailed description of this highly accurate LED driver system and its related sub-cells are presented. A hybrid PWM and linear current modulation scheme to adjust the LED driver output currents is explained. The novel design ideas to improve the LED current accuracy and channel-to-channel output current mismatch are also explained in detail. These ideas include a novel LED driver system architecture utilizing 1) a dynamic current mirror structure and 2) a closed loop structure to keep the feedback loop of the LED driver active all the time during both PWM on-duty and PWM off-duty periods. Inside the LED driver structure, the driving amplifier with a novel slew rate enhancement circuit to dramatically accelerate its response time is also presented.Dissertation/ThesisDoctoral Dissertation Electrical Engineering 201

Addressing On-Chip Power Conversion and Dissipation Issues in Many-Core System-on-a-Chip based on Conventional Silicon and Emerging Nanotechnologies

Title from PDF of title page viewed August 27, 2018Dissertation advisor: Masud H ChowdhuryVitaIncludes bibliographical references (pages 158-163)Thesis (Ph.D.)--School of Computing and Engineering and Department of Physics and Astronomy. University of Missouri--Kansas City, 2017Integrated circuits (ICs) are moving towards system-on-a-chip (SOC) designs. SOC allows various small and large electronic systems to be implemented in a single chip. This approach enables the miniaturization of design blocks that leads to high density transistor integration, faster response time, and lower fabrication costs. To reap the benefits of SOC and uphold the miniaturization of transistors, innovative power delivery and power dissipation management schemes are paramount. This dissertation focuses on on-chip integration of power delivery systems and managing power dissipation to increase the lifetime of energy storage elements. We explore this problem from two different angels: On-chip voltage regulators and power gating techniques. On-chip voltage regulators reduce parasitic effects, and allow faster and efficient power delivery for microprocessors. Power gating techniques, on the other hand, reduce the power loss incurred by circuit blocks during standby mode. Power dissipation (Ptotal = Pstatic and Pdynamic) in a complementary metal-oxide semiconductor (CMOS) circuit comes from two sources: static and dynamic. A quadratic dependency on the dynamic switching power and a more than linear dependency on static power as a form of gate leakage (subthreshold current) exist. To reduce dynamic power loss, the supply power should be reduced. A significant reduction in power dissipation occurs when portions of a microprocessor operate at a lower voltage level. This reduction in supply voltage is achieved via voltage regulators or converters. Voltage regulators are used to provide a stable power supply to the microprocessor. The conventional off-chip switching voltage regulator contains a passive floating inductor, which is difficult to be implemented inside the chip due to excessive power dissipation and parasitic effects. Additionally, the inductor takes a very large chip area while hampering the scaling process. These limitations make passive inductor based on-chip regulator design very unattractive for SOC integration and multi-/many-core environments. To circumvent the challenges, three alternative techniques based on active circuit elements to replace the passive LC filter of the buck convertor are developed. The first inductorless on-chip switching voltage regulator architecture is based on a cascaded 2nd order multiple feedback (MFB) low-pass filter (LPF). This design has the ability to modulate to multiple voltage settings via pulse with modulation (PWM). The second approach is a supplementary design utilizing a hybrid low drop-out scheme to lower the output ripple of the switching regulator over a wider frequency range. The third design approach allows the integration of an entire power management system within a single chipset by combining a highly efficient switching regulator with an intermittently efficient linear regulator (area efficient), for robust and highly efficient on-chip regulation. The static power (Pstatic) or subthreshold leakage power (Pleak) increases with technology scaling. To mitigate static power dissipation, power gating techniques are implemented. Power gating is one of the popular methods to manage leakage power during standby periods in low-power high-speed IC design. It works by using transistor based switches to shut down part of the circuit block and put them in the idle mode. The efficiency of a power gating scheme involves minimum Ioff and high Ion for the sleep transistor. A conventional sleep transistor circuit design requires an additional header, footer, or both switches to turn off the logic block. This additional transistor causes signal delay and increases the chip area. We propose two innovative designs for next generation sleep transistor designs. For an above threshold operation, we present a sleep transistor design based on fully depleted silicon-on-insulator (FDSOI) device. For a subthreshold circuit operation, we implement a sleep transistor utilizing the newly developed silicon-on ferroelectric-insulator field effect transistor (SOFFET). In both of the designs, the ability to control the threshold voltage via bias voltage at the back gate makes both devices more flexible for sleep transistors design than a bulk MOSFET. The proposed approaches simplify the design complexity, reduce the chip area, eliminate the voltage drop by sleep transistor, and improve power dissipation. In addition, the design provides a dynamically controlled Vt for times when the circuit needs to be in a sleep or switching mode.Introduction -- Background and literature review -- Fully integrated on-chip switching voltage regulator -- Hybrid LDO voltage regulator based on cascaded second order multiple feedback loop -- Single and dual output two-stage on-chip power management system -- Sleep transistor design using double-gate FDSOI -- Subthreshold region sleep transistor design -- Conclusio

3D ICs: An Opportunity for Fully-Integrated, Dense and Efficient Power Supplies

International audienceWith 3D technologies, the in-package solution allows integrated, efficient and granular power supplies to be designed for multi-core processors. As the converter design obtains few benefits from the scaling, 3DIC allows the best technology to be chosen i.e. one which suits the DC-DC converter design. This paper evaluates the achievable power efficiency between on-die and in-package converters using a combination of active (28 and 65nm CMOS nodes) and passive (poly, MIM, vertical capacitor) layers. Based on the same load power consumption, on-die and in-package switched capacitor converters achieve 65% and 78% efficiency, respectively, in a 1mm 2 silicon area. An additional high density capacitance layer (100nF/mm 2) improves efficiency by more than 20 points in 65nm for the same surface which emphasizes the need for dedicated technology for better power management integration. This paper shows that in-package power management is a key alternative for fully-integrated, dense and efficient power supplies

Integrated high-voltage switched-capacitor DC-DC converters

The focus of this work is on the integrated circuit (IC) level integration of high-voltage switched-capacitor (SC) converters with the goal of fully integrated power management solutions for system-on-chip (SoC) and system-in-pagage (SiP) applications. The full integration of SC converters provides a low cost and compact power supply solution for modern electronics. Currently, there are almost no fully integrated SC converters with input voltages above 5 V. The purpose of this work is to provide solutions for higher input voltages. The increasing challenges of a compact and efficient power supply on the chip are addressed. High-voltage rated components and the increased losses caused by parasitics not only reduce power density but also efficiency. Loss mechanisms in high-voltage SC converters are investigated resulting in an optimized model for high-voltage SC converters. The model developed allows an appropriate comparison of different semiconductor technologies and converter topologies. Methods and design proposals for loss reduction are presented. Control of power switches with their supporting circuits is a further challenge for high-voltage SC converters. The aim of this work is to develop fully integrated SC converters with a wide input voltage range. Different topologies and concepts are investigated. The implemented fully integrated SC converter has an input voltage range of 2 V to 13 V. This is twice the range of existing converters. This is achieved by an implemented buck and boost mode as well as 17 conversion ratios. Experimental results show a peak efficiency of 81.5%. This is the highest published peak efficiency for fully integrated SC converters with an input voltage > 5V. With the help of the model developed in this work, a three-phase SC converter topology for input voltages up to 60 V is derived and then investigated and discussed. Another focus of this work is on the power supply of sensor nodes and smart home applications with low-power consumption. Highly integrated micro power supplies that operate directly from mains voltage are particularly suitable for these applications. The micro power supply proposed in this work utilizes the high-voltage SC converter developed. The output power is 14 times higher and the power density eleven times higher than prior work. Since plenty of power switches are built into modern multi-ratio SC converters, the switch control circuits must be optimized with regard to low-power consumption and area requirements. In this work, different level shifter concepts are investigated and a low-power high-voltage level shifter for 50 V applications based on a capacitive level shifter is introduced. The level shifter developed exceeds the state of the art by a factor of more than eleven with a power consumption of 2.1pJ per transition. A propagation delay of 1.45 ns is achieved. The presented high-voltage level shifter is the first level shifter for 50 V applications with a propagation delay below 2 ns and power consumption below 20pJ per transition. Compared to the state of the art, the figure of merit is significantly improved by a factor of two. Furthermore, various charge pump concepts are investigated and evaluated within the context of this work. The charge pump, optimized in this work, improves the state of the art by a factor of 1.6 in terms of efficiency. Bidirectional switches must be implemented at certain locations within the power stage to prevent reverse conduction. The topology of a bidirectional switch developed in this work reduces the dynamic switching losses by 70% and the area consumption including the required charge pumps by up to 65% compared to the state of the art. These improvements make it possible to control the power switches in a fast and efficient way. Index terms — integrated power management, high input voltage, multi-ratio SC converter, level shifter, bidirectional switch, micro power supplyDer Schwerpunkt dieser Arbeit liegt auf der Erforschung von Switched-Capacitor (SC) Spannungswandler für höhere Eingangsspannungen. Ziel der Arbeit ist es Lösungen für ein voll auf dem Halbleiterchip integriertes Power Management anzubieten um System on Chip (SoC) und System in Package (SiP) zu ermöglichen. Die vollständige Integration von SC Spannungswandlern bietet eine kostengünstige und kompakte Spannungsversorgungslösung für moderne Elektronik. Der kontinuierliche Trend hin zu immer kompakterer Elektronik und hin zu höheren Versorgungsspannungen wird in dieser Arbeit adressiert. Aktuell gibt es sehr wenige voll integrierte SC Spannungswandler mit einer Eingangsspannung größer 5 V. Die mit steigender Spannung zunehmenden Herausforderungen an eine kompakte und effiziente Spannungsversorgung auf dem Chip werden in dieser Arbeit untersucht. Die höhere Spannungsfestigkeit der verwendeten Komponenten korreliert mit erhöhten Verlusten und erhöhtem Flächenverbrauch, welche sich negativ auf den Wirkungsgrad und die Leistungsdichte von SC Spannungswandlern auswirkt. Bestandteil dieser Arbeit ist die Untersuchung dieser Verlustmechanismen und die Entwicklung eines Modells, welches speziell für höhere Spannungen optimiert wurde. Das vorgestellte Modell ermöglicht zum einen die optimale Dimensionierung der Spannungswandler und zum anderen faire Vergleichsmöglichkeiten zwischen verschiedenen SC Spannungswandler Architekturen und Halbleitertechnologien. Demnach haben sowohl die gewählte Architektur und Halbleitertechnologie als auch die Kombination aus gewählter Architektur und Technologie erheblichen Einfluss auf die Leistungsfähigkeit der Spannungswandler. Ziel dieser Arbeit ist die Vollintegration eines SC Spannungswandlers mit einem weiten und hohen Eingangsspannungsbereich zu entwickeln. Dazu wurden verschiedene Schaltungsarchitekturen und Konzepte untersucht. Der vorgestellte vollintegrierte SC Spannungswandler weist einen Eingangsspannungsbereich von 2 V bis 13 V auf. Dies ist eine Verdopplung im Vergleich zum Stand der Technik. Dies wird durch einen implementierten Auf- und Abwärtswandler-Betriebsmodus sowie 17 Übersetzungsverhältnisse erreicht. Experimentelle Ergebnisse zeigen einen Spitzenwirkungsgrad von 81.5%. Dies ist der höchste veröffentlichte Spitzenwirkungsgrad für vollintegrierte SC Spannungswandler mit einer Eingangsspannung größer 5 V. Mit Hilfe des in dieser Arbeit entwickelten Modells wird eine dreiphasige SC Spannungswandler Architektur für Eingangsspannungen bis zu 60 V entwickelt und anschließend analysiert und diskutiert. Ein weiterer Schwerpunkt dieser Arbeit adressiert die kompakte Spannungsversorgung von Sensorknoten mit geringem Stromverbrauch, für Anwendungen wie Smart Home und Internet der Dinge (IoT). Für diese Anwendungen eignen sich besonders gut hochintegrierte Mikro-Netzteile, welche direkt mit dem 230VRMS-Hausnetz (bzw. 110VRMS) betrieben werden können. Das in dieser Arbeit vorgestellte Mikro-Netzteil nutzt einen in dieser Arbeit entwickelten SC Spannungswandler für hohe Eingangsspannungen. Die damit erzielte Ausgangsleistung ist 14-mal größer im Vergleich zum Stand der Technik. In SC Spannungswandlern für hohe Spannungen werden viele Leistungsschalter benötigt, deshalb muss bei der Schalteransteuerung besonders auf einen geringen Leistungsverbrauch und Flächenbedarf der benötigten Schaltungsblöcke geachtet werden. Gegenstand dieser Arbeit ist sowohl die Analyse verschiedener Konzepte für Pegelumsetzer, als auch die Entwicklung eines stromsparenden Pegelumsetzers für 50 V-Anwendungen. Mit einer Leistungsaufnahme von 2.1pJ pro Signalübergang reduziert der entwickelte Pegelumsetzer mit kapazitiver Kopplung um mehr als elfmal die Leistungsaufnahme im Vergleich zum Stand der Technik. Die erreichte Laufzeitverzögerung beträgt 1.45 ns. Damit erzielt der vorgestellte Hochspannungs-Pegelumsetzer als erster Pegelumsetzer für 50 V-Anwendungen eine Laufzeitverzögerung unter 2 ns und eine Leistungsaufnahme unter 20pJ pro Signalwechsel. Im Vergleich zum Stand der Technik wird die Leistungskennzahl um den Faktor zwei deutlich verbessert. Darüber hinaus werden im Rahmen dieser Arbeiten verschiedene Ladungspumpenkonzepte untersucht und bewertet. Die in dieser Arbeit optimierte Ladungspumpe verbessert den Stand der Technik um den Faktor 1.6 in Bezug auf den Wirkungsgrad. Die in dieser Arbeit entwickelte Schaltungsarchitektur eines bidirektionalen Schalters reduziert die dynamischen Schaltverluste um 70% und den benötigten Flächenbedarf inklusive der benötigten Ladungspumpe um bis zu 65% gegenüber dem Stand der Technik. Diese Verbesserungen ermöglichen es, die Leistungsschalter schnell und effizient anzusteuern. Schlagworte — Integriertes Powermanagement, hohe Eingangsspannung, Multi-Ratio SC Spannungswan- dler, Pegelumsetzer, bidirektionaler Schalter, Mikro-Netztei