A review of technologies and design techniques of millimeter-wave power amplifiers

his article reviews the state-of-the-art millimeter-wave (mm-wave) power amplifiers (PAs), focusing on broadband design techniques. An overview of the main solid-state technologies is provided, including Si, gallium arsenide (GaAs), GaN, and other III-V materials, and both field-effect and bipolar transistors. The most popular broadband design techniques are introduced, before critically comparing through the most relevant design examples found in the scientific literature. Given the wide breadth of applications that are foreseen to exploit the mm-wave spectrum, this contribution will represent a valuable guide for designers who need a single reference before adventuring in the challenging task of the mm-wave PA design

A 39-GHz Doherty-Like Power Amplifier with 22-dBm Output Power and 21% Power-Added Efficiency at 6-dB Power Back-Off

© 2024, IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works. This is the accepted manuscript version of a conference paper which has been published in final form at https://doi.org/10.1109/JETCAS.2024.3351075The design of a Doherty-like power amplifier for millimetre-wave (mm-wave) applications is presented in this work. The designed power amplifier employs a novel symmetrical loadmodulated balanced amplifier (S-LMBA) architecture. This design is advantageous in minimizing the undesired impedance interaction often encountered in the classic LMBA approach. Such interactions are typically due to the use of a non-50 Ω load at the isolation port of the output quadrature coupler. Moreover, magnitude and phase control networks are carefully designed to generate the specific magnitude and phase information for the designed S-LMBA. To demonstrate the proposed ideas, the SLMBA is fabricated in a 45-nm CMOS SOI technology. At 39 GHz, a 22.1 dBm saturated output power (Psat) with a maximum poweradded efficiency (PAE) of 25.7% is achieved. In addition, 1.68 times drain efficiency enhancement is obtained over an ideal Class-B operation, when the designed S-LMBA is operated at 6 dB power back-off. An average output power of 13.1 dBm with a PAE of 14.4% at an error vector magnitude (EVMrms) above -22.5 dB and adjacent channel power ratio (ACPR) of -23 dBc is also achieved, when a 200 MHz single carrier 64-quadratureamplitude- modulation (QAM) signal is used. Including all testing pads, the footprint of the designed S-LMBA is only 1.56 mm2.Peer reviewe

A survey on RF and microwave doherty power amplifier for mobile handset applications

This survey addresses the cutting-edge load modulation microwave and radio frequency power amplifiers for next-generation wireless communication standards. The basic operational principle of the Doherty amplifier and its defective behavior that has been originated by transistor characteristics will be presented. Moreover, advance design architectures for enhancing the Doherty power amplifier’s performance in terms of higher efficiency and wider bandwidth characteristics, as well as the compact design techniques of Doherty amplifier that meets the requirements of legacy 5G handset applications, will be discussed.Agencia Estatal de Investigación | Ref. TEC2017-88242-C3-2-RFundação para a Ciência e a Tecnologia | Ref. UIDP/50008/201

High Speed Integrated Circuits for High Speed Coherent Optical Communications

With the development of (sub) THz transistor technologies, high speed integrated circuits up to sub-THz frequencies are now feasible. These high speed and wide bandwidth ICs can improve the performance of optical components, coherent optical fiber communication, and imaging systems. In current optical systems, electrical ICs are used primarily as driving amplifiers for optical modulators, and in receiver chains including TIAs, AGCs, LPFs, ADCs and DSPs. However, there are numerous potential applications in optics using high speed ICs, and different approaches may be required for more efficient, compact and flexible optical systems.This dissertation will discuss three different approaches for optical components and communication systems using high speed ICs: a homodyne optical phase locked loop (OPLL), a heterodyne OPLL, and a new WDM receiver architecture.The homodyne OPLL receiver is designed for short-link optical communication systems using coherent modulation for high spectral efficiency. The phase-locked coherent receiver can recover the transmitted data without requiring complex back-end digital signal processing to recover the phase of the received optical carrier. The main components of the homodyne OPLL are a photonic IC (PIC), an electrical IC (EIC), and a loop filter. One major challenge in OPLL development is loop bandwidth; this must be of order 1 GHz in order for the loop to adequately track and suppress the phase fluctuations of the locked laser, yet a 1 GHz loop bandwidth demands small (<100 ps) propagation delays if the loop is to be stable. Monolithic integration of the high-speed loop components into one electrical and one photonic IC decreases the total loop delay. We have designed and demonstrated an OPLL with a compact size of 10 × 10 mm2, stably operating with a loop bandwidth of 1.1 GHz, a loop delay of 120 ps, a pull-in time of 0.55 μs and lock time of <10 ns. The coherent receiver can receive 40 Gb/s BPSK data with a bit error rate (BER) of <10-7, and operates up to 35 Gb/s with BER 10-12.The thesis also describes heterodyne OPLLs. These can be used to synthesize optical wavelengths of a broad bandwidth (optical wavelength synthesis) with narrow linewidth and with fast frequency switching. There are many applications of such narrow linewidth optical signal sources, including low phase noise mm-wave and THz-signal sources, wavelength-division-multiplexed optical transmitters, and coherent imaging and sensor systems. The heterodyne OPLL also has the same stability issues (loop delay and sensitivity) as the homodyne OPLL. In the EIC, a single sideband mixer operating using digital design principles (DSSBM) enables precisely controlled sweeping of the frequency of the locked laser, with control of the sign of the frequency offset. The loop's phase and frequency difference detector (PFD) uses digital design techniques to make the OPLL loop parameters only weakly sensitive to optical signal levels or optical or electrical component gains. The heterodyne OPLL operates stably with a loop bandwidth of 550 MHz and loop delay of <200 ps. An initial OPLL design exhibited optical frequency (wavelength) synthesis from -6 GHz to -2 GHz and from 2 GHz to 9 GHz. An improved OPLL reached frequency tuning up to 25 GHz. The homodyne OPLL exhibits -110 dBc/Hz phase noise at 10 MHz offset and -80 dBc/Hz at 5 kHz offset.Finally, the thesis describes a new WDM receiver architecture using broadband electrical ICs. In the proposed WDM receiver, a set of received signals at different optical wavelengths are mixed against a single optical local oscillator. This mixing converts the WDM channels to electrical signals in the receiver photocurrent, with each WDM signal being converted to an RF sub-carrier of different frequency. An electrical IC then separately converts each sub-carrier signal to baseband using single-sideband mixers and quadrature local oscillators. The proposed receiver needs less complex hardware than the arrays of wavelength-sensitive receivers now used for WDM, and can readily adjust to changes in the WDM channel frequencies. The proposed WDM receiver concept was demonstrated through several system experiments. Image rejection of greater than 25 dB, adjacent channel suppression of greater than 20 dB, operation with gridless channels, and six-channel data reception at a total 15 Gb/s (2.5 Gb/s BPSK × 6-channels) were demonstrated

Array Architectures and Physical Layer Design for Millimeter-Wave Communications Beyond 5G

Ever increasing demands in mobile data rates have resulted in exploration of millimeter-wave (mmW) frequencies for the next generation (5G) wireless networks. Communications at mmW frequencies is presented with two keys challenges. Firstly, high propagation loss requires base stations (BSs) and user equipment (UEs) to use a large number of antennas and narrow beams to close the link with sufficient received signal power. Consequently, communications using narrow beams create a new challenge in channel estimation and link establishment based on fine angular probing. Current mmW system use analog phased arrays that can probe only one angle at the time which results in high latency during link establishment and channel tracking. It is desirable to design low latency beam training by exploring both physical layer designs and array architectures that could replace current 5G approaches and pave the way to the communications for frequency bands in higher mmW band and sub-THz region where larger antenna arrays and communications bandwidth can be exploited. To this end, we propose a novel signal processing techniques exploiting unique properties of mmW channel, and show both theoretically, in simulation and experiments its advantages over conventional approaches. Secondly, we explore different array architecture design and analyze their trade-offs between spectral efficiency and power consumption and area. For comprehensive comparison, we have developed a methodology for optimal design of system parameters for different array architecture candidates based on the spectral efficiency target, and use these parameters to estimate the array area and power consumption based on the circuits reported in the literature. We show that the hybrid analog and digital architectures have severe scalability concerns in radio frequency signal distribution with increased array size and spatial multiplexing levels, while the fully-digital array architectures have the best performance and power/area trade-offs.The developed approaches are based on a cross-disciplinary research that combines innovation in model based signal processing, machine learning, and radio hardware. This work is the first to apply compressive sensing (CS), a signal processing tool that exploits sparsity of mmW channel model, to accelerate beam training of mmW cellular system. The algorithm is designed to address practical issues including the requirement of cell discovery and synchronization that involves estimation of angular channel together with carrier frequency offset and timing offsets. We have analyzed the algorithm performance in the 5G compliant simulation and showed that an order of magnitude saving is achieved in initial access latency for the desired channel estimation accuracy. Moreover, we are the first to develop and implement a neural network assisted compressive beam alignment to deal with hardware impairments in mmW radios. We have used 60GHz mmW testbed to perform experiments and show that neural networks approach enhances alignment rate compared to CS. To further accelerate beam training, we proposed a novel frequency selective probing beams using the true-time-delay (TTD) analog array architecture. Our approach utilizes different subcarriers to scan different directions, and achieves a single-shot beam alignment, the fastest approach reported to date. Our comprehensive analysis of different array architectures and exploration of emerging architectures enabled us to develop an order of magnitude faster and energy efficient approaches for initial access and channel estimation in mmW systems

Spatial-spectral Terahertz Networks

This paper focuses on the spatial-spectral terahertz (THz) networks, where transmitters equipped with leaky-wave antennas send information to their receivers at the THz frequency bands. As a directional and nearly planar antenna, the leaky-wave antenna allows for information transmissions with narrow beams and high antenna gains. The conventional large antenna arrays are confronted with challenging issues such as scaling limits and path discovery in the THz frequencies. Therefore, this work exploits the potential of leaky-wave antennas in the dense THz networks, to establish low-complexity THz links. By addressing the propagation angle-frequency coupling effects, the transmission rate is analyzed. The results show that the leaky-wave antenna is efficient for achieving the high-speed transmission rate. The co-channel interference management is unnecessary when the THz transmitters with large subchannel bandwidths are not extremely dense. A simple subchannel allocation solution is proposed, which enhances the transmission rate compared with the same number of subchannels with the equal allocation of the frequency band. After subchannel allocation, a low-complexity power allocation method is proposed to improve the energy efficiency.Comment: accepted by the IEEE Transactions on Wireless Communication

Novel Predistortion System for 4G/5G Small-Cell and Wideband Transmitters

To meet the growing demand for mobile data, various technologies are being introduced to wireless networks to increase system capacity. On one hand, large number of small-cell base stations are adopted to serve the reduced cell size; on the other hand, millimeter wave (mm-wave) systems with large antenna arrays that transmit ultra-wideband signals are expected in fifth generation (5G) networks. Power amplifiers (PAs), responsible for boosting the radio frequency (RF) signal power, are the most critical components in base station transmitters, and dominate the overall efficiency and linearity of the system. The design challenges to balance the contradictory requirements of efficiency and linearity of the PAs are usually addressed by linearization techniques, particularly the digital predistortion (DPD) system. However, existing DPD solutions face increasing difficulties keeping up with new developments in base station technologies. When considering sub-6 GHz small-cell base station transmitters, analog and RF predistortion techniques have recently received renewed attention due to their inherent low power nature. Their achievable linearization capacity is significantly limited, however, largely by their implementation complexity in realizing the needed predistortion models in analog circuitry. On the other hand, despite significant developments in DPD models for wideband signals, the implementations of such DPD models in practical hardware have received relatively little attention. Yet the conventional implementation of a DPD engine is limited by the maximum clock frequency of the digital circuitry employed and cannot be scaled to satisfy the growing bandwidth of transmitted signals for 5G networks. Furthermore, both analog and digital solutions require a transmitter-observation-receiver (TOR) to capture the PA outputs, necessitates the use of analog-to-digital converters (ADCs) whose complexity and power consumption increase with signal bandwidth. Such trend is not scalable for future base stations, and new innovations in feedback and training methods are required. This thesis presents a number of contributions to address the above identified challenges. To reduce the power overhead of the linearization system, a digitally-assisted analog-RF predistortion (DA-ARFPD) system that uses a novel predistortion model is introduced. The proposed finite-impulse-response assisted envelope memory polynomial (FIR-EMP) model allows for a reduction of hardware implementation complexity while maintaining good linearization capacity and low power overhead. A two-step small-signal-assisted parameter identification (SSAPI) algorithm is devised to estimate the parameters of the two main blocks of the FIR-EMP model, such that the training can be completed efficiently. A DA-ARFPD test bench has been built, which incorporates major RF components, to assess the validity of the proposed FIR-EMP scheme and the SSAPI algorithm. Measurement results show that the proposed FIR-EMP model with SSAPI algorithm can successfully linearize multiple PAs driven with various wideband and carrier-aggregated signals of up to 80~MHz modulation bandwidths for sub-6 GHz systems. Next, a hardware-efficient real-time DPD system with scalable linearization bandwidth for ultra-wideband 5G mm-wave transmitters is proposed. It uses a novel parallel-processing DPD engine architecture to process multiple samples per clock cycle, overcomes the linearization bandwidth limit imposed by the maximum clock rate of digital circuits used in conventional DPD implementation. Potentially unlimited linearization bandwidth could be achieved by using the proposed system with current digital circuit technologies. The linearization performance and bandwidth scalability of the proposed system is demonstrated experimentally using a silicon-based Doherty (DPA) with 400 MHz wideband signal operating at 28 GHz, and over-the-air measurements using a 64-element beamforming array with 800 MHz wideband signal, also at 28 GHz. The proposed DPD system achieves over 2.4 GHz linearization bandwidth using only a 300 MHz core clock for the digital circuits. Finally, to reduce the power consumption and cost of the TOR, a new approach to train the predistorter using under-sampled feedback signal is presented. Using aliased samples of the PA's output captured at either baseband or intermedia frequency (IF), the proposed algorithm is able to compute the coefficients of the predistortion engine to linearize the PA using a direct learning architecture. Experimentally, both the baseband and IF schemes achieve linearization performance comparable to a full-rate system. Implemented together with a parallel-processing based DPD engine on a field-programmable gate array (FPGA) based system-on-chip (SOC), the proposed feedback and training solution achieves over 2.4~GHz linearization bandwidth using an ADC operating at a clock rate of 200 MHz. Its performance is demonstrated experimentally by linearizing a silicon DPA with 200 MHz and 400 MHz signals in conductive measurements, and a 64-element beamforming array with 400 MHz and 800 MHz signals in over-the-air testing

Analytical Approaches to Load Modulation Power Amplifier Design

In future mobile communication networks, there will be a shift toward higher carrier frequencies and highly integrated multiple antenna systems. The system performance will largely depend on the available radio frequency (RF) hardware. As such, RF power amplifiers (PAs) with improved performance, e.g. energy efficiency, are needed. Active load modulation (ALM) is one of the most common PA efficiency enhancement techniques. Unfortunately, different ALM techniques come at the cost of degrading other PA attributes. Through investigation of new ALM design techniques, the overall objective of this thesis is to improve upon different attributes and performance trade-offs in ALM PAs for future wireless systems.\ua0The working principle of ALM PAs is determined by both how the individual transistors are operated and how their outputs are combined. In the first part of the thesis, an analytical approach, where the output combiner is assumed to be an arbitrary black-box, is applied to the Doherty PA. The fundamental interaction between the main and auxiliary transistors is analyzed and generalized. New solutions with improved performance are identified, such as higher gain and an improved efficiency-linearity trade-off. This approach also introduces improved integration possibilities, which are demonstrated by a transmitter where the antenna acts as both the radiator and the Doherty combiner. Additionally, the analytical approach is applied to an isolated two-way power divider. This unlocks many new possibilities, such as improved integration and layout flexibility. \ua0In the second part, one embodiment of the emerging ALM architecture, the load modulated balanced amplifier (LMBA), is proposed: the RF-input Doherty-like LMBA. Design equations are derived and the fundamental operation is studied. This variant presents several advantages over other known architectures, such as higher gain and device periphery scaling of the different transistors.\ua0The third part proposes a new measurement-based ALM PA design procedure, which emulates the full behavior of the transistors in any ALM architecture using active load-pull measurements. This method can predict the intricate behavior in ALM PAs and it gives measurement-based insights into the internal operation of the circuit already at the design stage. This facilitates the design for optimal ALM PA performance. \ua0The thesis contributes with several promising techniques for reducing performance trade-offs and improving the overall performance of ALM PAs. Therefore, the results will contribute to the development of more energy efficient and high capacity wireless services in the future

The 1st International Conference on Computational Engineering and Intelligent Systems

Computational engineering, artificial intelligence and smart systems constitute a hot multidisciplinary topic contrasting computer science, engineering and applied mathematics that created a variety of fascinating intelligent systems. Computational engineering encloses fundamental engineering and science blended with the advanced knowledge of mathematics, algorithms and computer languages. It is concerned with the modeling and simulation of complex systems and data processing methods. Computing and artificial intelligence lead to smart systems that are advanced machines designed to fulfill certain specifications. This proceedings book is a collection of papers presented at the first International Conference on Computational Engineering and Intelligent Systems (ICCEIS2021), held online in the period December 10-12, 2021. The collection offers a wide scope of engineering topics, including smart grids, intelligent control, artificial intelligence, optimization, microelectronics and telecommunication systems. The contributions included in this book are of high quality, present details concerning the topics in a succinct way, and can be used as excellent reference and support for readers regarding the field of computational engineering, artificial intelligence and smart system