Leakage current paths in PV transformer-less single-phase inverter topology and its mitigation through PWM for switching

The Photovoltaic (PV) is a part and parcel and well known for cost-effective and easy to operate features when it is used with transformer-less inverter based grid-tied distribution generation systems. It reduces the leakage current issue that actually occurs making paths from PV penal to ground. In this paper has been addressed this issue as main problem for reducing leakage current. Moreover, here is compared the proposed topology’s results to AC and DC-based transformer-less topologies. The possibilities of larger number of leakage current paths indicate power loss, which is the focus of work in this paper for different switching conditions. The results on leakage current paths using PSpice with different parasitic capacitance values from inverters of different topologies are compared with the simulation results of the topology proposed in this paper

Design and analysis of a new multi-level inverter topology with a reduced number of switches and controlled by PDPWM technique

With their many advantages, including low power dissipation in power switches, low harmonic content, and reduced electromagnetic interference (EMI) from the inverter, multilevel converter (MLI) topologies are becoming more and more in demand in high and medium power applications. This paper introduces a novel multi-level symmetric inverter topology with adopted control. The objectives of this article are to architecturally define the positions of the various switches, to choose the right switches and to propose an inverter control strategy that will eliminate harmonics while producing the ideal output voltage/current. By using fewer switching elements, fewer voltage sources, and switches with a total harmonic content (THD) which reduces losses and a drop in minimum voltage (Vstrssj), the proposed topology is more efficient than conventional inverters with the same number of levels. The new topology will be demonstrated using a seven-level single-phase inverter. For various modulation indices, MATLAB-SIMULINK is used to study and validate the topology

A New Modular Multilevel Inverter Topology of Reduced Components

Harmonic content of the yield voltage waveform diminishes as the quantity of yield voltage level increments. The primary focal points are lower Total Harmonic Distortion (THD), less weight on the power switches and higher proficiency. Be that as it may, increment in the gadget number because of expanded voltage levels makes the control strategy complex and subsequently costly. This venture displays a nine level inverter with lessened DC sources which is equipped for acquiring all added substance and subtractive mixes of information DC levels. This topology requires less power changes contrasted with regular multilevel inverter and less entryway drives. The proposed topology is exhibited through a nine-level inverter with a proper balance plot and definite reproduction has been done in MATLAB/Simulink. A correlation is made between proposed topology and the customary multilevel topology on the premise of gadget include, number of levels the yield voltage and THD

Modulated model predictive control for a 7-level cascaded h-bridge back-to-back converter

Multilevel Converters are known to have many advantages for electricity network applications. In particular Cascaded H-Bridge Converters are attractive because of their inherent modularity and scalability. Predictive control for power converters is advantageous as a result of its applicability to discrete system and fast response. In this paper a novel control technique, named Modulated Model Predictive Control, is introduced with the aim to increase the performance of Model Predictive Control. The proposed controller address a modulation scheme as part of the minimization process. The proposed control technique is described in detail, validated through simulation and experimental testing and compared with Dead-Beat and traditional Model Predictive Control. The results show the increased performance of the Modulated Model Predictive Control with respect to the classic Finite Control Set Model Predictive Control, in terms ofcurrent waveform THD. Moreover the proposed controller allows a multi-objective control, with respect to Dead-Beat Control that does not present this capability

Active DC voltage balancing PWM technique for high-power cascaded multilevel converters

In this paper a dedicated PWM technique specifically designed for single-phase (or four wire three-phase) multilevel Cascaded H-Bridge Converters is presented. The aim of the proposed technique is to minimize the DC-Link voltage unbalance, independently from the amplitude of the DC-Link voltage reference, and compensate the switching device voltage drops and on-state resistances. Such compensation can be used to achieve an increase in the waveform quality of the converter. This is particularly useful in high-power, low supply voltage applications where a low switching frequency is used. The DC-Link voltage balancing capability of the method removes the requirement for additional control loops to actively balance the DC-Link voltage on each H-Bridge, simplifying the control structure. The proposed modulation technique has been validated through the use of simulation and extensive experimental testing to confirm its effectiveness

Design and Hardware Implementation Considerations of Modified Multilevel Cascaded H-Bridge Inverter for Photovoltaic System

Inverters are an essential part in many applications including photovoltaic generation. With the increasing penetration of renewable energy sources, the drive for efficient inverters is gaining more and more momentum. In this paper, output power quality, power loss, implementation complexity, cost, and relative advantages of the popular cascaded multilevel H-bridge inverter and a modified version of it are explored. An optimal number of levels and the optimal switching frequency for such inverters are investigated, and a five-level architecture is chosen considering the trade-offs. This inverter is driven by level shifted in-phase disposition pulse width modulation technique to reduce harmonics, which is chosen through deliberate testing of other advanced disposition pulse width modulation techniques. To reduce the harmonics further, the application of filters is investigated, and an LC filter is applied which provided appreciable results. This system is tested in MATLAB/Simulink and then implemented in hardware after design and testing in Proteus ISIS. The general cascaded multilevel H-bridge inverter design is also implemented in hardware to demonstrate a novel low-cost MOSFET driver build for this study. The hardware setups use MOSFETs as switching devices and low-cost ATmega microcontrollers for generating the switching pulses via level shifted in-phase disposition pulse width modulation. This implementation substantiated the effectiveness of the proposed design

Level Doubling Network and Ripple Correlation Control MPPT Algorithm for Grid-Connected Photovoltaic Systems

The implementation of ripple correlation control (RCC) algorithms for maximum power point tracking (MPPT) schemes in PV generation systems is presented and discussed in this PhD thesis in order to improve static and dynamic performances. Improvements in RCC are introduced first, considering fast irradiance transients and a hybrid RCC scheme is proposed. Power quality of the PV generation system is improved by multilevel inverter implemented by level doubling network (LDN), reducing output voltage and current harmonics. Reference is made to single-phase single-stage multilevel PV generation systems, when the inverter input variables, actually PV voltage and PV current, have multiple low-frequency (ripple) harmonics. The harmonic analysis is carried out with reference to a multilevel configuration consisting in H-bridge inverter and level doubling network (LDN) cell, leading to a multilevel inverter having the double of output voltage levels compared to the basic H-bridge inverter topology (i.e., five levels vs. three levels). The LDN cell is basically a half-bridge fed by a floating capacitor, with self-balancing voltage capability. The multilevel configuration introduces additional PV voltage and current low-frequency harmonics, perturbing the basic implementation of the RCC scheme (based on the 100 Hz component in case of 50 Hz fundamental), leading to malfunctioning. The proposed RCC algorithm employs the PV current and voltage harmonics at a specific frequency for the estimation of the voltage derivative of the power dP/dV (or dI/dV), driving the PV operating point toward the MPP in a more precise and faster manner. The steady-state and transient performances of the proposed RCC-MPPT schemes have been tested and compared by MATLAB/ Simulink. Results have been verified by experimental tests considering the whole single-phase multilevel PV generation system, including real PV modules, multilevel IBGTs inverter, and utility grid