Design of an Ultra-Low Power RTC for the IoT

The Internet of Things is growing at an exponential rate. This new perception of reality is being researched even further nowadays because society is starting to develop an interest on these technologies. Market potential is increasing even further, since the foreseeable implementations are diverse and still to be detected. The future applications for the IoT are enthusiastic and they will increase the overall quality of life of the citizens of the world. Developing a component that is crucial for the sustainability of this implementation is the task that truly motivates the intended work for this project. Designing the full-custom circuitry and physical layout of a Real Time Clock becomes a job that has a lot of minor details that need considerable attention. These technicalities truly tone the developers skill and knowledge of different design principles. Besides, developing the solution using subthreshold CMOS techniques will put emphasis on different technological procedures. Producing devices that are heavily dependent on PVT variations, operational frequency and power consumption define this new task, that needs a stable approach to all these diverse figure of merits, even though they are all interconnected. The study and understanding of these different approaches allows for a more complex in depth grasp of this recent intriguing proceedings

Ultra-low Power Circuits for Internet of Things (IOT)

Miniaturized sensor nodes offer an unprecedented opportunity for the semiconductor industry which led to a rapid development of the application space: the Internet of Things (IoT). IoT is a global infrastructure that interconnects physical and virtual things which have the potential to dramatically improve people's daily lives. One of key aspect that makes IoT special is that the internet is expanding into places that has been ever reachable as device form factor continue to decreases. Extremely small sensors can be placed on plants, animals, humans, and geologic features, and connected to the Internet. Several challenges, however, exist that could possibly slow the development of IoT. In this thesis, several circuit techniques as well as system level optimizations to meet the challenging power/energy requirement for the IoT design space are described. First, a fully-integrated temperature sensor for battery-operated, ultra-low power microsystems is presented. Sensor operation is based on temperature independent/dependent current sources that are used with oscillators and counters to generate a digital temperature code. Second, an ultra-low power oscillator designed for wake-up timers in compact wireless sensors is presented. The proposed topology separates the continuous comparator from the oscillation path and activates it only for short period when it is required. As a result, both low power tracking and generation of precise wake-up signal is made possible. Third, an 8-bit sub-ranging SAR ADC for biomedical applications is discussed that takes an advantage of signal characteristics. ADC uses a moving window and stores the previous MSBs voltage value on a series capacitor to achieve energy saving compared to a conventional approach while maintaining its accuracy. Finally, an ultra-low power acoustic sensing and object recognition microsystem that uses frequency domain feature extraction and classification is presented. By introducing ultra-low 8-bit SAR-ADC with 50fF input capacitance, power consumption of the frontend amplifier has been reduced to single digit nW-level. Also, serialized discrete Fourier transform (DFT) feature extraction is proposed in a digital back-end, replacing a high-power/area-consuming conventional FFT.PHDElectrical EngineeringUniversity of Michigan, Horace H. Rackham School of Graduate Studieshttps://deepblue.lib.umich.edu/bitstream/2027.42/137157/1/seojeong_1.pd

Ultra-Low-Power Sensors and Receivers for IoT Applications

The combination of ultra-low power analog front-ends and CMOS-compatible transducers enable new applications, such as environmental monitors, household appliances, health trackers, etc. that are seamlessly integrated into our daily lives. Furthermore, wireless connectivity allows many of these sensors to operate both independently and collectively. These techniques collectively fulfil the recent surge of internet-of-things (IoT) applications that have the potential to fundamentally change daily life for millions of people.In this dissertation, the circuit and system design of wireless receivers and sensors is presented that explores the challenges of implementing long lifespan, high accuracy, and large coverage range IoT sensor networks. The first is a wake-up receiver (WuRX), which continuously monitors the RF environment to wake up a higher-power radio upon detection of a predetermined RF signature. This work both improves sensitivity and reduces power over prior art through a multi-faceted design featuring an impedance transformation network with large passive voltage gain, an active envelope detector with high input impedance to facilitate large passive voltage gain, a low-power precision comparator, and a low-leakage digital baseband correlator.Although pushing the prior WuRX performance boundary by orders of magnitude, the first work shows moderate sensitivity, inferior temperature robustness, and large area with external lumped components. Thus, the second work shows a miniaturized WuRX that is temperature-compensated, yet still consumes only nano-watt power and millimeter area while operating at 9 GHz. To further reduce the area, a global common-mode feedback is utilized across the envelope detector and baseband amplifier that eliminates the need for off-chip ac-coupling components. Multiple temperature-compensation techniques are proposed to maintain constant bandwidth of the signal path and constant clock frequency. Both WuRXs operate at 0.4 V supply, consume near-zero power and achieve ~-70 dBm sensitivity.Lastly, the first reported CMOS 2-in-1 relative humidity and temperature sensor is presented. A unified analog front-end interfaces on-chip transducers and converts the inputs into a frequency vis a high-linearity frequency-locked loop. An incomplete-settling switched-capacitor-based Wheatstone bridge is proposed to sense the inputs in a power-efficient fashion

Energy-Detecting Receivers for Wake-Up Radio Applications

In the energy-limited wireless sensor node applications, wake-up radios are required to reduce the average power consumption of the node. Energy-detecting receivers are the best fit for such low power operations. This thesis presents the energy-detecting receiver design; challenges; techniques to enhance sensitivity, selectivity; and multi-access operation. Self-mixers instead of the conventional envelope detectors are proposed and proved to be optimal for signal detection. A fully integrated wake-up receiver uses the self-mixer and time-encoded baseband signal processing to provide a sensitivity of -79.1dBm at 434MHz with 420pW of power, providing an 8dB better sensitivity at 10dB lower power consumption compared to the SoA. A novel approach using narrowband interferers as local oscillators will be presented to further enhance sensitivity and selectivity, effectively operating the energy-detector receiver as a direct down-conversion receiver. Additionally, a clockless continuous-time analog correlator will be introduced to enhance the selectivity to wide-band AM interferers. The architecture uses pulse-position-encoded analog signal processing with VCOs as integrators and pulse-controlled relaxation delays; it operates as a code-domain matched filter to de-spread asynchronous wake-up codes. This code-domain matched filtering also provides code-division multiple access (CDMA) for simultaneous wakeups. Additional enhancement in the link can be achieved using directional antennas, providing spatial gain and selectivity. Certain applications can leverage a nearby reflector similar to a Yagi antenna to enhance the directivity. A low power directional backscatter tag is proposed, it uses multiple antennas acting as a reflectarray by configuring constant phase gradients depending on the direction of arrival (DoA) of the signal. Thus, instead of harvesting energy, the same energy and the surrounding environment can be leveraged to enhance functionality (e.g. interferer as LO, using a backscatter tag on a wall) for low power operation. Innovations spanning both system and circuit architectures that leverage the ambient energy and environment to enable power-efficient solutions for next-generation wake-up radios are presented in this work

Ultra Low Power Analog Circuits for Wireless Sensor Node System.

This thesis will discuss essential analog circuit blocks required in ultra-low power wireless sensor node systems. A wireless sensor network system requires very high energy and power efficiency which is difficult to achieve with traditional analog circuits. First, 5.58nW real time clock using a DLL (Delay Locked Loop)-assisted pulse-driven crystal oscillator is discussed. In this circuit, the operational amplifier used in the traditional circuit was replaced with pulsed drivers. The pulse was generated at precise timing by a DLL. The circuit parts operate in different supply levels, generated on chip by using a switched capacitor network. The circuit was tested at different supply voltage and temperature. Its frequency characteristic along with power consumption were measured and compared to the traditional circuit. Next, a Schmitt trigger based pulse-driven crystal oscillator is discussed. In the first chapter, a DLL was used to generate a pulse with precise timing. However, testing results and recent study showed that the crystal oscillator can sustain oscillation even with inaccurate pulse timing. In this chapter, pulse location is determined by the Schmitt trigger. Simulation results show that this structure can still sustain oscillation at different process corners and temperature. In the next chapter, a sub-nW 8 bit SAR ADC (Successive Approximation Analog-to-Digital Converter) using transistor-stack DAC (Digital-to-Analog Converter) is discussed. To facilitate design effort and reduce the layout dependent effect, a conventional capacitive DAC was replaced with transistor-stack DAC with a 255:1 multiplexer. The control logic was designed with both TSPC (True Single Phase Clock) and CMOS logic to minimize transistor count. The ADC was implemented in a 65nm CMOS process and tested at different sampling rates and input signal frequency. Its linearity and power consumption was measured. Also, a similar design was implemented and tested using 180nm CMOS process as part of a sensor node system. Lastly, a multiple output level voltage regulator using a switched capacitor network for low-cost system is discussed.PhDElectrical EngineeringUniversity of Michigan, Horace H. Rackham School of Graduate Studieshttp://deepblue.lib.umich.edu/bitstream/2027.42/111626/1/dmyoon_1.pd

Power Management ICs for Internet of Things, Energy Harvesting and Biomedical Devices

This dissertation focuses on the power management unit (PMU) and integrated circuits (ICs) for the internet of things (IoT), energy harvesting and biomedical devices. Three monolithic power harvesting methods are studied for different challenges of smart nodes of IoT networks. Firstly, we propose that an impedance tuning approach is implemented with a capacitor value modulation to eliminate the quiescent power consumption. Secondly, we develop a hill-climbing MPPT mechanism that reuses and processes the information of the hysteresis controller in the time-domain and is free of power hungry analog circuits. Furthermore, the typical power-performance tradeoff of the hysteresis controller is solved by a self-triggered one-shot mechanism. Thus, the output regulation achieves high-performance and yet low-power operations as low as 12 µW. Thirdly, we introduce a reconfigurable charge pump to provide the hybrid conversion ratios (CRs) as 1⅓× up to 8× for minimizing the charge redistribution loss. The reconfigurable feature also dynamically tunes to maximum power point tracking (MPPT) with the frequency modulation, resulting in a two-dimensional MPPT. Therefore, the voltage conversion efficiency (VCE) and the power conversion efficiency (PCE) are enhanced and flattened across a wide harvesting range as 0.45 to 3 V. In a conclusion, we successfully develop an energy harvesting method for the IoT smart nodes with lower cost, smaller size, higher conversion efficiency, and better applicability. For the biomedical devices, this dissertation presents a novel cost-effective automatic resonance tracking method with maximum power transfer (MPT) for piezoelectric transducers (PT). The proposed tracking method is based on a band-pass filter (BPF) oscillator, exploiting the PT’s intrinsic resonance point through a sensing bridge. It guarantees automatic resonance tracking and maximum electrical power converted into mechanical motion regardless of process variations and environmental interferences. Thus, the proposed BPF oscillator-based scheme was designed for an ultrasonic vessel sealing and dissecting (UVSD) system. The sealing and dissecting functions were verified experimentally in chicken tissue and glycerin. Furthermore, a combined sensing scheme circuit allows multiple surgical tissue debulking, vessel sealer and dissector (VSD) technologies to operate from the same sensing scheme board. Its advantage is that a single driver controller could be used for both systems simplifying the complexity and design cost. In a conclusion, we successfully develop an ultrasonic scalpel to replace the other electrosurgical counterparts and the conventional scalpels with lower cost and better functionality

Wearable, low-power CMOS ISFETs and compensation circuits for on-body sweat analysis

Complementary metal-oxide-semiconductor (CMOS) technology has been a key driver behind the trend of reduced power consumption and increased integration of electronics in consumer devices and sensors. In the late 1990s, the integration of ion-sensitive field-effect transistors (ISFETs) into unmodified CMOS helped to create advancements in lab-on-chip technology through highly parallelised and low-cost designs. Using CMOS techniques to reduce power and size in chemical sensing applications has already aided the realisation of portable, battery-powered analysis platforms, however the possibility of integrating these sensors into wearable devices has until recently remained unexplored. This thesis investigates the use of CMOS ISFETs as wearable electrochemical sensors, specifically for on-body sweat analysis. The investigation begins by evaluating the ISFET sensor for wearable applications, identifying the key advantages and challenges that arise in this pursuit. A key requirement for wearable devices is a low power consumption, to enable a suitable operational life and small form factor. From this perspective, ISFETs are investigated for low power operation, to determine the limitations when trying to push down the consumption of individual sensors. Batteryless ISFET operation is explored through the design and implementation of a 0.35 \si{\micro\metre} CMOS ISFET sensing array, operating in weak-inversion and consuming 6 \si{\micro\watt}. Using this application-specific integrated circuit (ASIC), the first ISFET array powered by body heat is demonstrated and the feasibility of using near-field communication (NFC) for wireless powering and data transfer is shown. The thesis also presents circuits and systems for combatting three key non-ideal effects experienced by CMOS ISFETs, namely temperature variation, threshold voltage offset and drift. An improvement in temperature sensitivity by a factor of three compared to an uncompensated design is shown through measured results, while adding less than 70 \si{\nano\watt} to the design. A method of automatically biasing the sensors is presented and an approach to using spatial separation of sensors in arrays in applications with flowing fluids is proposed for distinguishing between signal and sensor drift. A wearable device using the ISFET-based system is designed and tested with both artificial and natural sweat, identifying the remaining challenges that exist with both the sensors themselves and accompanying components such as microfluidics and reference electrode. A new ASIC is designed based on the discoveries of this work and aimed at detecting multiple analytes on a single chip. %Removed In the latter half of the thesis, Finally, the future directions of wearable electrochemical sensors is discussed with a look towards embedded machine learning to aid the interpretation of complex fluid with time-domain sensor arrays. The contributions of this thesis aim to form a foundation for the use of ISFETs in wearable devices to enable non-invasive physiological monitoring.Open Acces

Ultra Low Power Circuits for Internet of Things and Deep Learning Accelerator Design with In-Memory Computing

Collecting data from environment and converting gathered data into information is the key idea of Internet of Things (IoT). Miniaturized sensing devices enable the idea for many applications including health monitoring, industrial sensing, and so on. Sensing devices typically have small form factor and thus, low battery capacity, but at the same time, require long life time for continuous monitoring and least frequent battery replacement. This thesis introduces three analog circuit design techniques featuring ultra-low power consumption for such requirements: (1) An ultra-low power resistor-less current reference circuit, (2) A 110nW resistive frequency locked on-chip oscillator as a timing reference, (3) A resonant current-mode wireless power receiver and battery charger for implantable systems. Raw data can be efficiently transformed into useful information using deep learning. However deep learning requires tremendous amount of computation by its nature, and thus, an energy efficient deep learning hardware is highly demanded to fully utilize this algorithm in various applications. This thesis also presents a pulse-width based computation concept which utilizes in-memory computing of SRAM.PHDElectrical EngineeringUniversity of Michigan, Horace H. Rackham School of Graduate Studieshttps://deepblue.lib.umich.edu/bitstream/2027.42/144173/1/myungjun_1.pd

A miniaturised autonomous sensor based on nanowire materials platform: the SiNAPS mote

A micro-power energy harvesting system based on core(crystalline Si)-shell(amorphous Si) nanowire solar cells together with a nanowire-modified CMOS sensing platform have been developed to be used in a dust-sized autonomous chemical sensor node. The mote (SiNAPS) is augmented by low-power electronics for power management and sensor interfacing, on a chip area of 0.25mm2. Direct charging of the target battery (e.g., NiMH microbattery) is achieved with end-to-end efficiencies up to 90% at AM1.5 illumination and 80% under 100 times reduced intensity. This requires matching the voltages of the photovoltaic module and the battery circumventing maximum power point tracking. Single solar cells show efficiencies up to 10% under AM1.5 illumination and open circuit voltages, Voc, of 450-500mV. To match the battery’s voltage the miniaturised solar cells (~1mm2 area) are connected in series via wire bonding. The chemical sensor platform (mm2 area) is set up to detect hydrogen gas concentration in the low ppm range and over a broad temperature range using a low power sensing interface circuit. Using Telran TZ1053 radio to send one sample measurement of both temperature and H2 concentration every 15 seconds, the average and active power consumption for the SiNAPS mote are less than 350nW and 2.1 μW respectively. Low-power miniaturised chemical sensors of liquid analytes through microfluidic delivery to silicon nanowires are also presented. These components demonstrate the potential of further miniaturization and application of sensor nodes beyond the typical physical sensors, and are enabled by the nanowire materials platform