INJECTION-LOCKING TECHNIQUES FOR MULTI-CHANNEL ENERGY EFFICIENT TRANSMITTER

Ph.DDOCTOR OF PHILOSOPH

Low-Power Integrated Circuits For Biomedical Applications

With thousands new cases of spinal cord injury reported everyday, many people suffer from paralysis and loss of sensation in both legs. Beside the healthcare costs, such a state severely deteriorates the patients' quality of life and may even lead to additional medical conditions. Therefore, there is a growing need for cyber-physical systems to restore the walking ability through bypassing the damaged spinal cord. This goal can be achieved by monitoring and processing patient's brain signals to enable brain-directed control of prosthetic legs. Among several existing methods to record brain signals, electrocorticography (ECoG) has gained popularity due to being robust to motion artifacts, having high spatial resolution and signal to noise ratio, being moderately invasive and the possibility of chronic implantation of recording grids with no or minor scar tissue formation. The latest property is of particular importance for the whole system to be a viable fully implantable solution. Furthermore, the implanted system has to operate independently with no or minimal need of external hardware (e.g. a bulky personal computer) to be individually and socially accepted. To implement a fully implantable system, low-power and miniaturized electronics are needed to reduced heat generation, increase battery life-time and be minimally intrusive. These requirements indicate that many of the system's components should be custom-designed to integrated as much functionality as possible in a given real estate. This thesis presents silicon tested prototypes of several building blocks for the envisioned system, namely, ultra low-power brain signal acquisition front-ends, a low-power and inductorless MedRadio transceiver, and a fast start-up crystal oscillator. Brain signal acquisition front-ends provide low noise amplification of weak ECoG biosignals. MedRadio transceiver enables communication between the implant and end effectors or base station (e.g. prosthetic legs or desktop computer). Crystal oscillator generates the reference signal for other system's components such as analog to digital converter. Novel techniques to improve important performance parameters (power consumption, low noise operation and interference resilience) have been introduced. Electrical, in-vitro and in-vivo experimental measurements have verified the functionality and performance of each design

A Low-Power BFSK/OOK Transmitter for Wireless Sensors

In recent years, significant improvements in semiconductor technology have allowed consistent development of wireless chipsets in terms of functionality and form factor. This has opened up a broad range of applications for implantable wireless sensors and telemetry devices in multiple categories, such as military, industrial, and medical uses. The nature of these applications often requires the wireless sensors to be low-weight and energy-efficient to achieve long battery life. Among the various functions of these sensors, the communication block, used to transmit the gathered data, is typically the most power-hungry block. In typical wireless sensor networks, transmission range is below 10 meters and required radiated power is below 1 milliwatt. In such cases, power consumption of the frequency-synthesis circuits prior to the power amplifier of the transmitter becomes significant. Reducing this power consumption is currently the focus of various research endeavors. A popular method of achieving this goal is using a direct-modulation transmitter where the generated carrier is directly modulated with baseband data using simple modulation schemes. Among the different variations of direct-modulation transmitters, transmitters using unlocked digitally-controlled oscillators and transmitters with injection or resonator-locked oscillators are widely investigated because of their simple structure. These transmitters can achieve low-power and stable operation either with the help of recalibration or by sacrificing tuning capability. In contrast, phase-locked-loop-based (PLL) transmitters are less researched. The PLL uses a feedback loop to lock the carrier to a reference frequency with a programmable ratio and thus achieves good frequency stability and convenient tunability. This work focuses on PLL-based transmitters. The initial goal of this work is to reduce the power consumption of the oscillator and frequency divider, the two most power-consuming blocks in a PLL. Novel topologies for these two blocks are proposed which achieve ultra-low-power operation. Along with measured performance, mathematical analysis to derive rule-of-thumb design approaches are presented. Finally, the full transmitter is implemented using these blocks in a 130 nanometer CMOS process and is successfully tested for low-power operation

Low-Power Wake-Up Receivers

The Internet of Things (IoT) is leading the world to the Internet of Everything (IoE), where things, people, intelligent machines, data and processes will be connected together. The key to enter the era of the IoE lies in enormous sensor nodes being deployed in the massively expanding wireless sensor networks (WSNs). By the year of 2025, more than 42 billion IoT devices will be connected to the Internet. While the future IoE will bring priceless advantages for the life of mankind, one challenge limiting the nowadays IoT from further development is the ongoing power demand with the dramatically growing number of the wireless sensor nodes. To address the power consumption issue, this dissertation is motivated to investigate low-power wake-up receivers (WuRXs) which will significantly enhance the sustainability of the WSNs and the environmental awareness of the IoT. Two proof-of-concept low-power WuRXs with focuses on two different application scenarios have been proposed. The first WuRX, implemented in a cost-effective 180-nm CMOS semiconductor technology, operates at 401−406-MHz band. It is a good candidate for application scenarios, where both a high sensitivity and an ultra-low power consumption are in demand. Concrete use cases are, for instance, medical implantable applications or long-range communications in rural areas. This WuRX does not rely on a further assisting semiconductor technology, such as MEMS which is widely used in state-of-the-art WuRXs operating at similar frequencies. Thus, this WuRX is a promising solution to low-power low-cost IoT. The second WuRX, implemented in a 45-nm RFSOI CMOS technology, was researched for short-range communication applications, where high-density conventional IoT devices should be installed. By investigation of the WuRX for operation at higher frequency band from 5.5 GHz to 7.5 GHz, the nowadays ever more over-traffic issues that arise at low frequency bands such as 2.4 GHz can be substantially addressed. A systematic, analytical research route has been carried out in realization of the proposed WuRXs. The thesis begins with a thorough study of state-of-the-art WuRX architectures. By examining pros and cons of these architectures, two novel architectures are proposed for the WuRXs in accordance with their specific use cases. Thereon, key WuRX parameters are systematically analyzed and optimized; the performance of relevant circuits is modeled and simulated extensively. The knowledge gained through these investigations builds up a solid theoretical basis for the ongoing WuRX designs. Thereafter, the two WuRXs have been analytically researched, developed and optimized to achieve their highest performance. Proof-of-concept circuits for both the WuRXs have been fabricated and comprehensively characterized under laboratory conditions. Finally, measurement results have verified the feasibility of the design concept and the feasibility of both the WuRXs