Architectures and Circuits Leveraging Injection-Locked Oscillators for Ultra-Low Voltage Clock Synthesis and Reference-less Receivers for Dense Chip-to-Chip Communications

High performance computing is critical for the needs of scientific discovery and economic competitiveness. An extreme-scale computing system at 1000x the performance of today’s petaflop machines will exhibit massive parallelism on multiple vertical fronts, from thousands of computational units on a single processor to thousands of processors in a single data center. To facilitate such a massively-parallel extreme-scale computing, a key challenge is power. The challenge is not power associated with base computation but rather the problem of transporting data from one chip to another at high enough rates. This thesis presents architectures and techniques to achieve low power and area footprint while achieving high data rates in a dense very-short reach (VSR) chip-to-chip (C2C) communication network. High-speed serial communication operating at ultra-low supplies improves the energy-efficiency and lowers the power envelop of a system doing an exaflop of loops. One focus area of this thesis is clock synthesis for such energy-efficient interconnect applications operating at high speeds and ultra-low supplies. A sub-integer clockfrequency synthesizer is presented that incorporates a multi-phase injection-locked ring-oscillator-based prescaler for operation at an ultra-low supply voltage of 0.5V, phase-switching based programmable division for sub-integer clock-frequency synthesis, and automatic calibration to ensure injection lock. A record speed of 9GHz has been demonstrated at 0.5V in 45nm SOI CMOS. It consumes 3.5mW of power at 9.12GHz and 0.052 of area, while showing an output phase noise of -100dBc/Hz at 1MHz offset and RMS jitter of 325fs; it achieves a net of -186.5 in a 45-nm SOI CMOS process. This thesis also describes a receiver with a reference-less clocking architecture for high-density VSR-C2C links. This architecture simplifies clock-tree planning in dense extreme-scaling computing environments and has high-bandwidth CDR to enable SSC for suppressing EMI and to mitigate TX jitter requirements. It features clock-less DFE and a high-bandwidth CDR based on master-slave ILOs for phase generation/rotation. The RX is implemented in 14nm CMOS and characterized at 19Gb/s. It is 1.5x faster that previous reference-less embedded-oscillator based designs with greater than 100MHz jitter tolerance bandwidth and recovers error-free data over VSR-C2C channels. It achieves a power-efficiency of 2.9pJ/b while recovering error-free data (BER 200MHz and the INL of the ILO-based phase-rotator (32- Steps/UI) is <1-LSB. Lastly, this thesis develops a time-domain delay-based modeling of injection locking to describe injection-locking phenomena in nonharmonic oscillators. The model is used to predict the locking bandwidth, and the locking dynamics of the locked oscillator. The model predictions are verified against simulations and measurements of a four-stage differential ring oscillator. The model is further used to predict the injection-locking behavior of a single-ended CMOS inverter based ring oscillator, the lock range of a multi-phase injection-locked ring-oscillator-based prescaler, as well as the dynamics of tracking injection phase perturbations in injection-locked masterslave oscillators; demonstrating its versatility in application to any nonharmonic oscillator

Ultralow-noise modelocked lasers

Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2002.Includes bibliographical references (p. 343-357).This electronic version was submitted by the student author. The certified thesis is available in the Institute Archives and Special Collections.The measurement, design, and theory of ultralow-noise actively modelocked lasers are presented. We demonstrate quantum-limited noise performance of a hybridly modelocked semiconductor laser with an rms timing jitter of only 47 fs (10 Hz to 10 MHz) and 86 fs (10 Hz to 4.5 GHz). The daunting task of measuring ultralow-noise levels is solved by a combined use of microwave and optical measurement techniques that yield complete characterization of the laser noise from DC to half the laser repetition rate. Optical cross-correlation techniques are shown to be a useful tool for quantifying fast noise processes, isolating the timing jitter noise component, measuring timing jitter asymmetries, and measuring correlations of pulses in harmonically modelocked lasers. A noise model for harmonically modelocked lasers is presented that illustrates how to correctly interpret the amplitude noise and timing jitter from microwave measurements. Using information about the supermodes, the amplitude and timing noise can be quantified independently, thereby making it possible to measure the noise of harmonically modelocked lasers with multi-gigahertz repetition rates. Methods to further reduce the noise of a modelocked laser are explored. We demonstrate that photon seeding is effective at reducing the noise of a modelocked semiconductor laser without increasing the pulse width. Experimental demonstrations of a timing jitter eater, consisting of a phase modulator and dispersive fiber, show that.(cont.) An analytical theory for semiconductor lasers that includes carrier dynamics is presented. Ultralow noise performance is achieved by reducing the dispersion of the cavity, reducing the linear losses in the cavity, by operating at high optical powers, and with a tight optical filter. The gain dynamics of the semiconductor laser do not severely degrade the noise performance.by Leaf Alden Jiang.Ph.D

A 3.2 GHz Injection-Locked Ring Oscillator-Based Phase-Locked-Loop for Clock Recovery

An injection-locked ring oscillator-based phase-locked-loop targeting clock recovery for space application at 3.2 GHz is presented here. Most clock recovery circuits need a very low phase noise and jitter performance and are thus based on LC-type oscillators. These excellent performances come at the expense of a very poor integration density. To alleviate this issue, this work introduces an injection-locked ring oscillator-based PLL circuit. The combination of the injection-locking process with the use of ring oscillators allows for the benefit of excellent jitter performance while presenting an extremely low surface area due to an architecture without any inductor. The injection locking principle is addressed, and evidence of its phase noise and jitter improvements are confirmed through measurement results. Indeed, phase noise and jitter enhancements up to 43 dB and 23.3 mUI, respectively, were measured. As intended, this work shows the best integration density compared to recent similar state-of-the-art studies. The whole architecture measures 0.1 mm2 while consuming 34.6 mW in a low-cost 180 nm CMOS technology

Digital enhancement techniques for fractional-N frequency synthesizers

Meeting the demand for unprecedented connectivity in the era of internet-of-things (IoT) requires extremely energy efficient operation of IoT nodes to extend battery life. Managing the data traffic generated by trillions of such nodes also puts severe energy constraints on the data centers. Clock generators that are essential elements in these systems consume significant power and therefore must be optimized for low power and high performance. The focus of this thesis is on improving the energy efficiency of frequency synthesizers and clocking modules by exploring design techniques at both the architectural and circuit levels. In the first part of this work, a digital fractional-N phase locked loop (FNPLL) that employs a high resolution time-to-digital converter (TDC) and a truly ΔΣ fractional divider to achieve low in-band noise with a wide bandwidth is presented. The fractional divider employs a digital-to-time converter (DTC) to cancel out ΔΣ quantization noise in time domain, thus alleviating TDC dynamic range requirements. The proposed digital architecture adopts a narrow range low-power time-amplifier based TDC (TA-TDC) to achieve sub 1ps resolution. Fabricated in 65nm CMOS process, the prototype PLL achieves better than -106dBc/Hz in-band noise and 3MHz PLL bandwidth at 4.5GHz output frequency using 50MHz reference. The PLL achieves excellent jitter performance of 490fsrms, while consumes only 3.7mW. This translates to the best reported jitter-power figure-of-merit (FoM) of -240.5dB among previously reported FNPLLs. Phase noise performance of ring oscillator based digital FNPLLs is severely compromised by conflicting bandwidth requirements to simultaneously suppress oscillator phase and quantization noise introduced by the TDC, ΔΣ fractional divider, and digital-to-analog converter (DAC). As a consequence, their FoM that quantifies the power-jitter tradeoff is at least 25dB worse than their LC-oscillator based FNPLL counterparts. In the second part of this thesis, we seek to close this performance gap by extending PLL bandwidth using quantization noise cancellation techniques and by employing a dual-path digital loop filter to suppress the detrimental impact of DAC quantization noise. A prototype was implemented in a 65nm CMOS process operating over a wide frequency range of 2.0GHz-5.5GHz using a modified extended range multi-modulus divider with seamless switching. The proposed digital FNPLL achieves 1.9psrms integrated jitter while consuming only 4mW at 5GHz output. The measured in-band phase noise is better than -96 dBc/Hz at 1MHz offset. The proposed FNPLL achieves wide bandwidth up to 6MHz using a 50 MHz reference and its FoM is -228.5dB, which is at about 20dB better than previously reported ring-based digital FNPLLs. In the third part, we propose a new multi-output clock generator architecture using open loop fractional dividers for system-on-chip (SoC) platforms. Modern multi-core processors use per core clocking, where each core runs at its own speed. The core frequency can be changed dynamically to optimize for performance or power dissipation using a dynamic frequency scaling (DFS) technique. Fast frequency switching is highly desirable as long as it does not interrupt code execution; therefore it requires smooth frequency transitions with no undershoots. The second main requirement in processor clocking is the capability of spread spectrum frequency modulation. By spreading the clock energy across a wide bandwidth, the electromagnetic interference (EMI) is dramatically reduced. A conventional PLL clock generation approach suffers from a slow frequency settling and limited spread spectrum modulation capabilities. The proposed open loop fractional divider architecture overcomes the bandwidth limitation in fractional-N PLLs. The fractional divider switches the output frequency instantaneously and provides an excellent spread spectrum performance, where precise and programmable modulation depth and frequency can be applied to satisfy different EMI requirements. The fractional divider has unlimited modulation bandwidth resulting in spread spectrum modulation with no filtering, unlike fractional-N PLL; consequently it achieves higher EMI reduction. A prototype fractional divider was implemented in a 65nm CMOS process, where the measured peak-to-peak jitter is less than 27ps over a wide frequency range from 20MHz to 1GHz. The total power consumption is about 3.2mW for 1GHz output frequency. The all-digital implementation of the divider occupies the smallest area of 0.017mm2 compared to state-of-the-art designs. As the data rate of serial links goes higher, the jitter requirements of the clock generator become more stringent. Improving the jitter performance of conventional PLLs to less than (200fsrms) always comes with a large power penalty (tens of mWs). This is due to the PLL coupled noise bandwidth trade-off, which imposes stringent noise requirements on the oscillator and/or loop components. Alternatively, an injection-locked clock multiplier (ILCM) provides many advantages in terms of phase noise, power, and area compared to classical PLLs, but they suffer from a narrow lock-in range and a high sensitivity to PVT variations especially at a large multiplication factor (N). In the fourth part of this thesis, a low-jitter, low-power LC-based ILCM with a digital frequency-tracking loop (FTL) is presented. The proposed FTL relies on a new pulse gating technique to continuously tune the oscillator's free-running frequency. The FTL ensures robust operation across PVT variations and resolves the race condition existing in injection locked PLLs by decoupling frequency tuning from the injection path. As a result, the phase locking condition is only determined by the injection path. This work also introduces an accurate theoretical large-signal analysis for phase domain response (PDR) of injection locked oscillators (ILOs). The proposed PDR analysis captures the asymmetric nature of ILO's lock-in range, and the impact of frequency error on injection strength and phase noise performance. The proposed architecture and analysis are demonstrated by a prototype fabricated in 65 nm CMOS process with active area of 0.25mm2. The prototype ILCM multiplies the reference frequency by 64 to generate an output clock in the range of 6.75GHz-8.25GHz. A superior jitter performance of 190fsrms is achieved, while consuming only 2.25mW power. This translates to a best FoM of -251dB. Unlike conventional PLLs, ILCMs have been fundamentally limited to only integer-N operation and cannot synthesize fractional-N frequencies. In the last part of this thesis, we extend the merits of ILCMs to fractional-N and overcome this fundamental limitation. We employ DTC-based QNC techniques in order to align injected pulses to the oscillator's zero crossings, which enables it to pull the oscillator toward phase lock, thus realizing a fractional-N ILCM. Fabricated in 65nm CMOS process, a prototype 20-bit fractional-N ILCM with an output range of 6.75GHz-8.25GHz consumes only 3.25mW. It achieves excellent jitter performance of 110fsrms and 175fsrms in integer- and fractional-N modes respectively, which translates to the best-reported FoM in both integer- (-255dB) and fractional-N (-252dB) modes. The proposed fractional-N ILCM also features the first-reported rapid on/off capability, where the transient absolute jitter performance at wake-up is bounded below 4ps after less than 4ns. This demonstrates almost instantaneous phase settling. This unique capability enables tremendous energy saving by turning on the clock multiplier only when needed. This energy proportional operation leverages idle times to save power at the system-level of wireline and wireless transceivers

Self-Calibrated, Low-Jitter and Low-Reference-Spur Injection-Locked Clock Multipliers

Department of Electrical EngineeringThis dissertation focuses primarily on the design of calibrators for the injection-locked clock multiplier (ILCM). ILCMs have advantage to achieve an excellent jitter performance at low cost, in terms of area and power consumption. The wide loop bandwidth (BW) of the injection technique could reject the noise of voltage-controlled oscillator (VCO), making it thus suitable for the rejection of poor noise of a ring-VCO and a high frequency LC-VCO. However, it is difficult to use without calibrators because of its sensitiveness in process-voltage-temperature (PVT) variations. In Chapter 2, conventional frequency calibrators are introduced and discussed. This dissertation introduces two types of calibrators for low-power high-frequency LC-VCO-based ILFMs in Chapter 3 and Chapter 4 and high-performance ring-VCO-based ILCM in Chapter 5. First, Chapter 3 presents a low power and compact area LC-tank-based frequency multiplier. In the proposed architecture, the input signals have a pulsed waveform that involves many high-order harmonics. Using an LC-tank that amplifies only the target harmonic component, while suppressing others, the output signal at the target frequency can be obtained. Since the core current flows for a very short duration, due to the pulsed input signals, the average power consumption can be dramatically reduced. Effective removal of spurious tones due to the damping of the signal is achieved using a limiting amplifier. In this work, a prototype frequency tripler using the proposed architecture was designed in a 65 nm CMOS process. The power consumption was 950 ??W, and the active area was 0.08 mm2. At a 3.12 GHz frequency, the phase noise degradation with respect to the theoretical bound was less than 0.5 dB. Second, Chapter 4 presents an ultra-low-phase-noise ILFM for millimeter wave (mm-wave) fifth-generation (5G) transceivers. Using an ultra-low-power frequency-tracking loop (FTL), the proposed ILFM is able to correct the frequency drifts of the quadrature voltage-controlled oscillator of the ILFM in a real-time fashion. Since the FTL is monitoring the averages of phase deviations rather than detecting or sampling the instantaneous values, it requires only 600??W to continue to calibrate the ILFM that generates an mm-wave signal with an output frequency from 27 to 30 GHz. The proposed ILFM was fabricated in a 65-nm CMOS process. The 10-MHz phase noise of the 29.25-GHz output signal was ???129.7 dBc/Hz, and its variations across temperatures and supply voltages were less than 2 dB. The integrated phase noise from 1 kHz to 100 MHz and the rms jitter were???39.1 dBc and 86 fs, respectively. Third, Chapter 5 presents a low-jitter, low-reference-spur ring voltage-controlled oscillator (ring VCO)-based ILCM. Since the proposed triple-point frequency/phase/slope calibrator (TP-FPSC) can accurately remove the three root causes of the frequency errors of ILCMs (i.e., frequency drift, phase offset, and slope modulation), the ILCM of this work is able to achieve a low-level reference spur. In addition, the calibrating loop for the frequency drift of the TP-FPSC offers an additional suppression to the in-band phase noise of the output signal. This capability of the TP-FPSC and the naturally wide bandwidth of the injection-locking mechanism allows the ILCM to achieve a very low RMS jitter. The ILCM was fabricated in a 65-nm CMOS technology. The measured reference spur and RMS jitter were ???72 dBc and 140 fs, respectively, both of which are the best among the state-of-the-art ILCMs. The active silicon area was 0.055 mm2, and the power consumption was 11.0 mW.clos

Applications and Integration of Optical Frequency Combs

Optical frequency combs have a wide range of applications in science and technology, including but not limited to timekeeping, optical frequency synthesis, spectroscopy, searching for exoplanets, ranging, and microwave generation. The integration of microresonator with other photonic components enables the high-volume production of wafer-scale optical frequency combs, soliton microcombs. However, it faces two considerable obstacles: optical isolation, which is challenging to integrate on-chip at acceptable performance levels, and power-hungry electronic control circuits, which are required for the generation and stabilization of soliton microcombs. In this thesis, we describe the design and early commissioning of the laser frequency comb for astronomical calibration using electro-optic modulation. We also focus on the realization of a novel and compact chip-scale optical frequency comb, soliton microcomb, including the progress made towards the visible soliton microcomb generation and the demonstration of low power operation of a soliton microcomb along contours of constant power in the phase space. We introduce a soliton spectrometer using dual-locked counter-propagating soliton microcombs to provide high-resolution frequency measurement. Finally, we look into the integration of lasers and high-Q microresonators. The self-injection locking process has been shown to create a new turnkey soliton operating point that eliminates difficult-to-integrate optical isolation as well as complex startup and feedback loops. Moreover, this technique also simplifies the access to high-efficiency dark soliton states without special dispersion engineering of microresonators

Mode-locked quantum-dot lasers and amplifiers: Ultra-short pulse generation, amplification and stabilization

Die zeitliche Stabilität eines optischen Pulszugs, welcher von einem modengekoppelten Laser erzeugt wird, ist für alle zeitkritischen Anwendungen wichtig. Ein Maß für die zeitliche Instabilität ist die Periodenschwankung. Diese Periodenschwankung hat ihre Ursache primär in der Spontanemission. Um diese Periodenschwankungen zu verringern existiert eine Vielzahl an Stabilisierungsmöglichkeiten. Hierbei spielt die optische Rückkopplung eine wichtige und verbreitete Rolle. Der Einfluss der optischen Rückkopplung auf die Periodenschwankung wurde in der Litaratur experimentell und in numerischen Simulationen untersucht. Eine qualitative als auch quantitative Erklärung der Verringerung der Periodenschwankungen konnte bisher allerdings nicht gefunden werden. In dieser Arbeit wird eine systematische Untersuchung verschiedener ausgewählter Rückkopplungskonfigurationen und insbesondere der optische Rückkopplung durchgeführt, welche es letztendlich erlaubt, den Mechanismus zu identifizieren und zu quantifizieren, welcher für die Verringerung der Periodenschwankungen verantwortlich ist. Der dabei erhaltene Zugewinn an Wissen wird durch eine Kombination aus speziell ausgewählten Experimenten und durch die Entwicklung eines entsprechenden einfachen und intuitiven Modells und den damit erhaltenen Simulationsergebnissen erreicht. Dieser Reduktionsmechanismus der Periodenschwankungen wird unter anderem für den wichtigsten Fall der optischen Rückkopplung identifiziert und es kann herausgefunden werden, dass dieser auf zwei Effekten basiert. Einerseits findet eine Wechselwirkung zwischen der zeitlichen Phase des optischen Pulses im Resonator und des rückgekoppelten Pulses statt, welche zu einer gemittelten zeitlichen Phase des resultierenden Gesamtpulses führt. Im Modell wird nur diese eine Wechselwirkung bewusst implementiert. Solch eine Wechselwirkung ist bei hoch entwickelten Modellen automatisch und intrinsisch gegeben. Kohärenz ist für solch eine Wechselwirkung nicht notwendig. Die gemittelte zeitliche Phase des resultierenden Gesamtpulses repräsentiert einen statistischen Effekt welcher sich aus der reduzierten statistischen Korrelation der zeitlichen Phase zwischen beiden Pulsen ergibt, welche ihre Ursache in der langen Verzögerungsdauer der optischen Rückkopplung hat. Diese reduzierte Korrelation resultiert zusammen mit der wechelwirkung der zeitlichen Phase in reduzierten Periodenschwankungen. Die Einfachheit des entwickelten Modells erleichtert im Gegensatz zu hoch entwickelten und damit komplexen Modellen den Erkenntnisgewinn. Insbesondere ermöglichen die meisten Modelle aufgrund der erforderlichen langen Rechenzeiten nicht den Zugang zu der langen Verzögerungsdauer welche erforderlich ist, um den statistischen Effekt des Mechanismus der Periodenschwankungsreduktion zu beobachten. Neben dieser zeitlichen Stabilität des optischen Pulszugs spielt die Stabilität der Amplitude des Pulszugs eine essentielle Rolle für viele Anwendungen. In der Tat ist die passive Modenkopplung kein automatisch stabiler Prozess, sondern erfordert ein delikates Gleichgewicht einer Vielzahl an Parametern. Solche ungewünschten Amplitudeninstabilitäten äußern sich oft im Güteschalten oder in der gütegeschalteten Modenkopplung und stellen immer noch ein unerwünschtes Phänomen für eine Vielzahl an Lasertypen dar und sind immer noch Gegenstand experimenteller und theoretischer Untersuchungen. Wenn die Amplitudenstabilität eines Lasers nicht durch korrekte Projektierung erreicht werden kann müssen nachträgliche, externe, aktive und aufwändige Maßnahmen durchgeführt werden. In dieser Arbeit wird eine einfache und passive optoelektrische Schleife präsentiert, untersucht und erklärt, welche in der Lage ist, Amplitudeninstabilitäten passiv modengekoppelter Halbleiterlaser zu reduzieren. Dieser optoelektrischer Ansatz besteht aus einem Hochpassfilter welcher die Aborbersektion des Halbleiterlasers erdet und damit wie ein differentieller Photostromempfänger und Regler wirkt. Die beobachtete Reduktion der Amplitudeninstabilitäten resultiert aus der Reduktion der dynamischen Ansammlung der photoerzeugten Ladungsträger und dämpft damit Niederfrequenzfluktuationen. Hierbei wird die Absorbersektion gleichzeitig als Photodiode und Kontrollelement genutzt indem der ungewünschte photogenerierte Wechselstrom am Absorber geerdet wird. Diese Schaltung kann als differentielle, passive Kontrollschleife angesehen werden, die die änderungen des Photostroms verringert und damit starke Oszillationen der Ausgangsleistung unterdrückt. Nach der Entwicklung eines Verständnisses der Periodenschwankungen und der Untersuchung der Möglichkeiten der Reduktion dieser Periodenschwankungen als auch durch die Demonstration einer einfachen experimentellen Möglichkeit der Reduktion von Amplitudeninstabilitäten von passiv modengekoppelten Halbleiterlasern kann das erweiterte Potential in Bezug auf die Erzeugung von ultrakurzen Pulsen mit hoher Leistung durch neuartige trapezförmige quantenpunktbasierte modengekoppelte Halbleiterlaser als auch durch neuartige trapezförmige quantenpunktbasierte optischen Verstärker ausgenutzt werden. Das Ziel ist es, Anwendungen erreichen zu können, die im Moment von Festkörperlasern bedient werden. Ein solcher Anwendungsbereich ist die biomedizinische nichtlineare Mikroskopie wobei günstige, kompakte und robuste Pulsquellen für eine weite Verbreitung vorteilhaft wären. Hierbei bieten quantenpunktbasierte Quellen die ideale Wellenlänge um hohe optische Eindringtiefen zu erreichen. In dieser Arbeit wird die Erzeugung ultrakurzer Pulse durch neuartige gewinngeführte trapezförmige modengekoppelte Halbleiterlaser mit einem Schwerpunkt auf zeitliche Stabilität, Amplitudenstabilität, optische Pulslänge und Pulsspitzenleistung untersucht. Diese gewinngeführten Strukturen bieten den Vorteil einer vereinfachten Herstellung. Weiterhin wird die Verstärkungsfähigkeit neuartiger gewinngeführter trapezförmiger quantenpunktbasierter optischer Verstärker untersucht. Die erzielten Ergebnisse demonstrieren Erzeugung und Verstärkung ultrakurzer Pulse mit Pulsspitzenleistungen die unmittelbares Anwendungspotential bieten. Neben all diesen systematischen Untersuchungen, der Entwicklung einer verständlichem, nützlichen und simplen aber trotzdem effektiven Stabilisierungsmethode für Amplitudenfluktuationen und der Demonstration der exzellenten Leistungsfähigkeit der neuartigen trapezförmigen quantenpunktbasierten modengekoppelten Laser und optischen Verstärker ergeben sich weitere interessante Untersuchungen für die Zukunft. Halbleiterbasierte sättigbare Absorberspiegel werden weitläufig genutzt um Modenkopplung von Festkörperlasern zu ermöglichen. Der hier vorgestellte passive elektrische Stabilisierungsansatz könnte für elektrisch kontrollierbare halbleiterbasierte sättigbare Absorberspiegel angewendet werden, um die Stabilisierungseigenschaften dieser Lasersysteme zu untersuchen. Das entwickelte einfache Modell für die Periodenschwankungen könnte durch Hinzufügen der Simulation von Amplitudeninstabilitäten erweitert werden, um weitere Erkenntnisse der Wechselwirkung von Amplitudeninstabilität und Periodenschwankungen zu untersuchen. Von der Blickrichtung des Verständnisses aus wäre es spannend zu untersuchen wie sich die optische Rückkopplung auf die Periodenschwankungen in verschiedenen Betriebszuständen des modengekoppelten Lasers auswirkt. Das wird motiviert durch die hier gewonnenen Ergebnisse, die zeigen, wie durch verstimmte optische Rückkopplung die Pulsdynamik untersucht werden kann. Dadurch, dass quantenpunktbasierte modengekopplete Halbleiterlaser und Verstärker eine reichhaltige Dynamik auf unterschiedlichen Zeitskalen aufweisen, bieten sie die Möglichkeit, diese zu untersuchen als auch die auftretende Amplituden- und Zeitdynamik des erzeugten optischen Pulszugs zu kontrollieren, was einerseits einen tieferen Einblick in die zugrundeliegenden Mechnismen als auch andereseits die Verbesserung der Stabilität des Pulszugs ermöglicht

Generation of terahertz-modulated optical signals using AlGaAs/GaAs laser diodes

The Thesis reports on the research activities carried out under the Semiconductor-Laser Terahertz-Frequency Converters Project at the Department of Electronics and Electrical Engineering, University of Glasgow. The Thesis presents the work leading to the demonstration of reproducible harmonic modelocked operation from a novel design of monolithic semiconductor laser, comprising a compound cavity formed by a 1-D photonic-bandgap (PBG) mirror. Modelocking was achieved at a harmonic of the fundamental round-trip frequency with pulse repetition rates from 131 GHz up to a record-high frequency of 2.1 THz. The devices were fabricated from GaAs/AlGaAs material emitting at a wavelength of 860 nm and incorporated two gain sections with an etched PBG reflector between them, and a saturable absorber section. Autocorrelation studies are reported, which allow the device behaviour for different modelocking frequencies, compound cavity ratios, and type and number of intra-cavity reflectors to be analyzed. The highly reflective PBG microstructures are shown to be essential for subharmonic-free modelocking operation of the high-frequency devices. It was also demonstrated that the multi-slot PBG reflector can be replaced with two separate slots with smaller reflectivity. Some work was also done on the realisation of a dual-wavelength source using a broad-area laser diode in an external grating-loaded cavity. However, the source failed to deliver the spectrally-narrow lines required for optical heterodyning applications. Photomixer devices incorporating a terahertz antenna for optical-to microwave down-conversion were fabricated, however, no down-conversion experiments were attempted. Finally, novel device designs are proposed that exploit the remarkable spectral and modelocking properties of compound-cavity lasers. The ultrafast laser diodes demonstrated in this Project can be developed for applications in terahertz imaging, medicine, ultrafast optical links and atmospheric sensing

Comparative Study of Passive Modelocking Configurations in Semiconductor Lasers

This thesis is concerned with the investigation of different configurations of semiconductor lasers to generate short optical pulses through passive modelocking, and the analysis of the possible uses for these optical pulse generators. Three different modelocking configurations have been studied to generate optical pulses at frequencies between 1 and 15 GHz; two of them monolithic configurations, namely all active cavity mode-locked lasers and extended cavity mode-locked lasers and the third one being an external cavity configuration. The all active cavity mode-locked lasers have the advantage of having the easiest and most reliable fabrication process, but exhibited high threshold, around 100 mA for 5 mm long laser, broad pulses, around 10 ps, and high timing jitter levels, up to 22 ps (1 kHz-l0MHz). The extended cavity mode-locked lasers, which incorporate active and passive sections, are also easy to fabricate, but the reliability of the fabrication process depends on the reliability of the technique to fabricate the passive section of the device. They are excellent short pulse generators with very low threshold current, around 25 mA for a 5 mm long laser, pulses as narrow as 3.5 ps and jitter levels as low as 9 ps (1 kHz- 10MHz), which indicates a high stability in the pulse generation. With the external cavity configuration the pulse generation frequency can be reduced to values as low as hundreds of MHz. The drawback with this type of laser is their mechanical instability, which makes them a difficult device to work with. An important application for these optical pulse generators is that of all-optical clock recovery. The locking range of the monolithic configurations, under external periodic excitation, was studied. The all active cavity lasers showed a locking range wider than 0.15% of the free running modelocking frequency, whilst the extended cavity lasers locking range was around 0.03% of the free running modelocking frequency