620 research outputs found
1.28 and 5.12 Gbps multi-channel twinax cable receiver ASICs for the ATLAS Inner Tracker Pixel Detector Upgrade
We present two prototypes of a gigabit transceiver ASIC, GBCR1 and GBCR2,
both designed in a 65-nm CMOS technology for the ATLAS Inner Tracker Pixel
Detector readout upgrade.
The first prototype, GBCR1, has four upstream receiver channels and one
downstream transmitter channel with pre-emphasis. Each upstream channel
receives the data at 5.12 Gbps through a 5 meter AWG34 Twinax cable from an
ASIC driver located on the pixel module and restores the signal from the high
frequency loss due to the low mass cable. The signal is retimed by a recovered
clock before it is sent to the optical transmitter VTRx+. The downstream driver
is designed to transmit the 2.56 Gbps signal from lpGBT to the electronics on
the pixel module over the same cable. The peak-peak jitter (throughout the
paper jitter is always peak-peak unless specified) of the restored signal is
35.4 ps at the output of GBCR1, and 138 ps for the downstream channel at the
cable ends. GBCR1 consumes 318 mW and is tested.
The second prototype, GBCR2, has seven upstream channels and two downstream
channels. Each upstream channel works at 1.28 Gbps to recover the data directly
from the RD53B ASIC through a 1 meter custom FLEX cable followed by a 6 meter
AWG34 Twinax cable. The equalized signal of each upstream channel is retimed by
an input 1.28 GHz phase programmable clock. Compared with the signal at the
FLEX input, the additional jitter of the equalized signal is about 80 ps when
the retiming logic is o . When the retiming logic is on, the jitter is 50 ps at
GBCR2 output, assuming the 1.28 GHz retiming clock is from lpGBT. The
downstream is designed to transmit the 160 Mbps signal from lpGBT through the
same cable connection to RD53B and the jitter is about 157 ps at the cable
ends. GBCR2 consumes about 150 mW when the retiming logic is on. This design
was submitted in November 2019.Comment: 7 pages, 15 figure
Advanced digital modulation: Communication techniques and monolithic GaAs technology
Communications theory and practice are merged with state-of-the-art technology in IC fabrication, especially monolithic GaAs technology, to examine the general feasibility of a number of advanced technology digital transmission systems. Satellite-channel models with (1) superior throughput, perhaps 2 Gbps; (2) attractive weight and cost; and (3) high RF power and spectrum efficiency are discussed. Transmission techniques possessing reasonably simple architectures capable of monolithic fabrication at high speeds were surveyed. This included a review of amplitude/phase shift keying (APSK) techniques and the continuous-phase-modulation (CPM) methods, of which MSK represents the simplest case
Deep Space Network information system architecture study
The purpose of this article is to describe an architecture for the Deep Space Network (DSN) information system in the years 2000-2010 and to provide guidelines for its evolution during the 1990s. The study scope is defined to be from the front-end areas at the antennas to the end users (spacecraft teams, principal investigators, archival storage systems, and non-NASA partners). The architectural vision provides guidance for major DSN implementation efforts during the next decade. A strong motivation for the study is an expected dramatic improvement in information-systems technologies, such as the following: computer processing, automation technology (including knowledge-based systems), networking and data transport, software and hardware engineering, and human-interface technology. The proposed Ground Information System has the following major features: unified architecture from the front-end area to the end user; open-systems standards to achieve interoperability; DSN production of level 0 data; delivery of level 0 data from the Deep Space Communications Complex, if desired; dedicated telemetry processors for each receiver; security against unauthorized access and errors; and highly automated monitor and control
On-board processing satellite network architecture and control study
The market for telecommunications services needs to be segmented into user classes having similar transmission requirements and hence similar network architectures. Use of the following transmission architecture was considered: satellite switched TDMA; TDMA up, TDM down; scanning (hopping) beam TDMA; FDMA up, TDM down; satellite switched MF/TDMA; and switching Hub earth stations with double hop transmission. A candidate network architecture will be selected that: comprises multiple access subnetworks optimized for each user; interconnects the subnetworks by means of a baseband processor; and optimizes the marriage of interconnection and access techniques. An overall network control architecture will be provided that will serve the needs of the baseband and satellite switched RF interconnected subnetworks. The results of the studies shall be used to identify elements of network architecture and control that require the greatest degree of technology development to realize an operational system. This will be specified in terms of: requirements of the enabling technology; difference from the current available technology; and estimate of the development requirements needed to achieve an operational system. The results obtained for each of these tasks are presented
Customer premise service study for 30/20 GHz satellite system
Satellite systems in which the space segment operates in the 30/20 GHz frequency band are defined and compared as to their potential for providing various types of communications services to customer premises and the economic and technical feasibility of doing so. Technical tasks performed include: market postulation, definition of the ground segment, definition of the space segment, definition of the integrated satellite system, service costs for satellite systems, sensitivity analysis, and critical technology. Based on an analysis of market data, a sufficiently large market for services is projected so as to make the system economically viable. A large market, and hence a high capacity satellite system, is found to be necessary to minimize service costs, i.e., economy of scale is found to hold. The wide bandwidth expected to be available in the 30/20 GHz band, along with frequency reuse which further increases the effective system bandwidth, makes possible the high capacity system. Extensive ground networking is required in most systems to both connect users into the system and to interconnect Earth stations to provide spatial diversity. Earth station spatial diversity is found to be a cost effective means of compensating the large fading encountered in the 30/20 GHz operating band
Characterization of a gigabit transceiver for the ATLAS inner tracker pixel detector readout upgrade
We present a gigabit transceiver prototype Application Specific Integrated
Circuit (ASIC), GBCR, for the ATLAS Inner Tracker (ITk) Pixel detector readout
upgrade. GBCR is designed in a 65-nm CMOS technology and consists of four
upstream receiver channels, a downstream transmitter channel, and an
Inter-Integrated Circuit (I2C) slave. The upstream channels receive the data at
5.12 Gbps passing through 5-meter 34-American Wire Gauge (AWG) Twin-axial
(Twinax) cables, equalize them, retime them with a recovered clock, and then
drive an optical transmitter. The downstream channel receives the data at 2.56
Gbps from an optical receiver and drives the cable as same as the upstream
channels. The jitter of the upstream channel output is measured to be 35 ps
(peak-peak) when the Clock-Data Recovery (CDR) module is turned on and the
jitter of the downstream channel output after the cable is 138 ps (peak-peak).
The power consumption of each upstream channel is 72 mW when the CDR module is
turned on and the downstream channel consumes 27 mW. GBCR survives the total
ionizing dose of 200 kGy.Comment: 11 pages, 14 figure
Quaternary pulse position modulation electronics for free-space laser communications
The development of a high data-rate communications electronic subsystem for future application in free-space, direct-detection laser communications is described. The dual channel subsystem uses quaternary pulse position modulation (QPPM) and operates at a throughput of 650 megabits per second. Transmitting functions described include source data multiplexing, channel data multiplexing, and QPPM symbol encoding. Implementation of a prototype version in discrete gallium arsenide logic, radiofrequency components, and microstrip circuitry is presented
ONU power saving modes in next generation optical access networks: progress, efficiency and challenges
The optical network unit (ONU), installed at a customer's premises, accounts for about 60% of power in current fiber-to-the-home (FTTH) networks. We propose a power consumption model for the ONU and evaluate the ONU power consumption in various next generation optical access (NGOA) architectures. Further, we study the impact of the power savings of the ONU in various low power modes such as power shedding, doze and sleep. (c) 2012 Optical Society of Americ
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