657 research outputs found
New CMOS Realization of Voltage Differencing Buffered Amplifier and Its Biquad Filter Applications
In this paper, new biquad filter configuration using a recently introduced active element, namely Voltage Differencing Buffered Amplifier (VDBA), is proposed. This block has high impedance input terminals and low impedance output terminal, providing advantages at voltage mode circuits. Besides, VDBA has a transconductance gain, thus the proposed circuits can be employed without using any external resistors. Two new voltage-mode biquad filter configurations are presented for VDBA application. Each proposed filter employs two active elements and two or three passive components. Filters, having three inputs and single output, can realize voltage-mode low-pass, band-pass, high-pass, band-stop, and all-pass filters. The biquad filters have low output impedances that is necessity for cascadability for voltage mode circuits, and no critical component matching conditions are required. For the second biquad, quality factor can be adjusted via resistor independently of the natural frequency. Simulation results are given to, confirming the theoretical analysis. The proposed biquad filters are simulated using TSMC CMOS 0.35 ”m technology. LTSPICE simulations of the proposed circuits give results that agree well with the theoretical analysis
A Low-Voltage Electronically Tunable MOSFET-C Voltage-Mode First-Order All-Pass Filter Design
This paper presents a simple electronically tunable voltage-mode first-order all-pass filter realization with MOSFET-C technique. In comparison to the classical MOSFET-C filter circuits that employ active elements including large number of transistors the proposed circuit is only composed of a single two n-channel MOSFET-based inverting voltage buffer, three passive components, and one NMOS-based voltage-controlled resistor, which is with advantage used to electronically control the pole frequency of the filter in range 103 kHz to 18.3 MHz. The proposed filter is also very suitable for low-voltage operation, since between its supply rails it uses only two MOSFETs. In the paper the effect of load is investigated. In addition, in order to suppress the effect of non-zero output resistance of the inverting voltage buffer, two compensation techniques are also introduced. The theoretical results are verified by SPICE simulations using PTM 90 nm level-7 CMOS process BSIM3v3 parameters, where +/- 0.45 V supply voltages are used. Moreover, the behavior of the proposed filter was also experimentally measured using readily available array transistors CD4007UB by Texas Instruments
Low-Voltage Ultra-Low-Power Current Conveyor Based on Quasi-Floating Gate Transistors
The field of low-voltage low-power CMOS technology has grown rapidly in recent years; it is an essential prerequisite particularly for portable electronic equipment and implantable medical devices due to its influence on battery lifetime. Recently, significant improvements in implementing circuits working in the low-voltage low-power area have been achieved, but circuit designers face severe challenges when trying to improve or even maintain the circuit performance with reduced supply voltage. In this paper, a low-voltage ultra-low-power current conveyor second generation CCII based on quasi-floating gate transistors is presented. The proposed circuit operates at a very low supply voltage of only ±0.4 V with rail-to-rail voltage swing capability and a total quiescent power consumption of mere 9.5 ”W. Further, the proposed circuit is not only able to process the AC signal as it's usual at quasi-floating gate transistors but also the DC which extends the applicability of the proposed circuit. In conclusion, an application example of the current-mode quadrature oscillator is presented. PSpice simulation results using the 0.18 ”m TSMC CMOS technology are included to confirm the attractive properties of the proposed circuit
Utilizing Unconventional CMOS Techniques for Low Voltage Low Power Analog Circuits Design for Biomedical Applications
Tato disertaÄnĂ prĂĄce se zabĂœvĂĄ navrĆŸenĂm nĂzkonapÄĆ„ovĂœch, nĂzkopĆĂkonovĂœch analogovĂœch obvodĆŻ, kterĂ© pouĆŸĂvajĂ nekonvenÄnĂ techniky CMOS. LĂ©kaĆskĂĄ zaĆĂzenĂ na bateriovĂ© napĂĄjenĂ, jako systĂ©my pro dlouhodobĂœ fyziologickĂœ monitoring, pĆenosnĂ© systĂ©my, implantovatelnĂ© systĂ©my a systĂ©my vhodnĂ© na noĆĄenĂ, musĂ bĂœt male a lehkĂ©. KromÄ toho je nutnĂ©, aby byly tyto systĂ©my vybaveny bateriĂ s dlouhou ĆŸivotnostĂ. Z tohoto dĆŻvodu pĆevlĂĄdajĂ v biomedicĂnskĂœch aplikacĂch tohoto typu nĂzkopĆĂkonovĂ© integrovanĂ© obvody. NekonvenÄnĂ techniky jako napĆ. vyuĆŸitĂ transistorĆŻ s ĆĂzenĂœm substrĂĄtem (Bulk-Driven âBDâ), s plovoucĂm hradlem (Floating-Gate âFGâ), s kvazi plovoucĂm hradlem (Quasi-Floating-Gate âQFGâ), s ĆĂzenĂœm substrĂĄtem s plovoucĂm hradlem (Bulk-Driven Floating-Gate âBD-FGâ) a s ĆĂzenĂœm substrĂĄtem s kvazi plovoucĂm hradlem (Bulk-Driven Quasi-Floating-Gate âBD-QFGâ), se v nedĂĄvnĂ© dobÄ ukĂĄzaly jako efektivnĂ prostĆedek ke zjednoduĆĄenĂ obvodovĂ©ho zapojenĂ a ke snĂĆŸenĂ velikosti napĂĄjecĂho napÄtĂ smÄrem k prahovĂ©mu napÄtĂ u tranzistorĆŻ MOS (MOST). V prĂĄci jsou podrobnÄ pĆedstaveny nejdĆŻleĆŸitÄjĆĄĂ charakteristiky nekonvenÄnĂch technik CMOS. Tyto techniky byly pouĆŸity pro vytvoĆenĂ nĂzko napÄĆ„ovĂœch a nĂzko vĂœkonovĂœch CMOS struktur u nÄkterĂœch aktivnĂch prvkĆŻ, napĆ. Operational Transconductance Amplifier (OTA) zaloĆŸenĂ© na BD, FG, QFG, a BD-QFG techniky; Tunable Transconductor zaloĆŸenĂœ na BD MOST; Current Conveyor Transconductance Amplifier (CCTA) zaloĆŸenĂœ na BD-QFG MOST; Z Copy-Current Controlled-Current Differencing Buffered Amplifier (ZC-CC-CDBA) zaloĆŸenĂœ na BD MOST; Winner Take All (WTA) and Loser Take All (LTA) zaloĆŸenĂœ na BD MOST; Fully Balanced Four-Terminal Floating Nullor (FBFTFN) zaloĆŸenĂœ na BD-QFG technice. Za ĂșÄelem ovÄĆenĂ funkÄnosti vĂœĆĄe zmĂnÄnĂœch struktur, byly tyto struktury pouĆŸity v nÄkolika aplikacĂch. VĂœkon navrĆŸenĂœch aktivnĂch prvkĆŻ a pĆĂkladech aplikacĂ je ovÄĆovĂĄn prostĆednictvĂm simulaÄnĂch programĆŻ PSpice Äi Cadence za pouĆŸitĂ technologie 0.18 m CMOS.This doctoral thesis deals with designing ultra-low-voltage (LV) low-power (LP) analog circuits utilizing the unconventional CMOS techniques. Battery powered medical devices such as; long term physiological monitoring, portable, implantable, and wearable systems need to be small and lightweight. Besides, long life battery is essential need for these devices. Thus, low-power integrated circuits are always paramount in such biomedical applications. Recently, unconventional CMOS techniques i.e. Bulk-Driven (BD), Floating-Gate (FG), Quasi-Floating-Gate (QFG), Bulk-Driven Floating-Gate (BD-FG) and Bulk-Driven Quasi-Floating-Gate (BD-QFG) MOS transistors (MOSTs) have revealed as effective devices to reduce the circuit complexity and push the voltage supply of the circuit towards threshold voltage of the MOST. In this work, the most important features of the unconventional CMOS techniques are discussed in details. These techniques have been utilized to perform ultra-LV LP CMOS structures of several active elements i.e. Operational Transconductance Amplifier (OTA) based on BD, FG, QFG, and BD-QFG techniques; Tunable Transconductor based on BD MOST; Current Conveyor Transconductance Amplifier (CCTA) based on BD-QFG MOST; Z Copy-Current Controlled-Current Differencing Buffered Amplifier (ZC-CC-CDBA) based on BD MOST; Winner Take All (WTA) and Loser Take All (LTA) based on BD MOST; Fully Balanced Four-Terminal Floating Nullor (FBFTFN) based on BD-QFG technique. Moreover, to verify the workability of the proposed structures, they were employed in several applications. The performance of the proposed active elements and their applications were investigated through PSpice or Cadence simulation program using 0.18 m CMOS technology.
Low Voltage Low Power Analogue Circuits Design
DisertaÄnĂ prĂĄce je zamÄĆena na vĂœzkum nejbÄĆŸnÄjĆĄĂch metod, kterĂ© se vyuĆŸĂvajĂ pĆi nĂĄvrhu analogovĂœch obvodĆŻ s vyuĆŸitĂ nĂzkonapÄĆ„ovĂœch (LV) a nĂzkopĆĂkonovĂœch (LP) struktur. Tyto LV LP obvody mohou bĂœt vytvoĆeny dĂky vyspÄlĂœm technologiĂm nebo takĂ© vyuĆŸitĂm pokroÄilĂœch technik nĂĄvrhu. DisertaÄnĂ prĂĄce se zabĂœvĂĄ prĂĄvÄ pokroÄilĂœmi technikami nĂĄvrhu, pĆedevĆĄĂm pak nekonvenÄnĂmi. Mezi tyto techniky patĆĂ vyuĆŸitĂ prvkĆŻ s ĆĂzenĂœm substrĂĄtem (bulk-driven - BD), s plovoucĂm hradlem (floating-gate - FG), s kvazi plovoucĂm hradlem (quasi-floating-gate - QFG), s ĆĂzenĂœm substrĂĄtem s plovoucĂm hradlem (bulk-driven floating-gate - BD-FG) a s ĆĂzenĂœm substrĂĄtem s kvazi plovoucĂm hradlem (quasi-floating-gate - BD-QFG). PrĂĄce je takĂ© orientovĂĄna na moĆŸnĂ© zpĆŻsoby implementace znĂĄmĂœch a modernĂch aktivnĂch prvkĆŻ pracujĂcĂch v napÄĆ„ovĂ©m, proudovĂ©m nebo mix-mĂłdu. Mezi tyto prvky lze zaÄlenit zesilovaÄe typu OTA (operational transconductance amplifier), CCII (second generation current conveyor), FB-CCII (fully-differential second generation current conveyor), FB-DDA (fully-balanced differential difference amplifier), VDTA (voltage differencing transconductance amplifier), CC-CDBA (current-controlled current differencing buffered amplifier) a CFOA (current feedback operational amplifier). Za ĂșÄelem potvrzenĂ funkÄnosti a chovĂĄnĂ vĂœĆĄe zmĂnÄnĂœch struktur a prvkĆŻ byly vytvoĆeny pĆĂklady aplikacĂ, kterĂ© simulujĂ usmÄrĆovacĂ a induktanÄnĂ vlastnosti diody, dĂĄle pak filtry dolnĂ propusti, pĂĄsmovĂ© propusti a takĂ© univerzĂĄlnĂ filtry. VĆĄechny aktivnĂ prvky a pĆĂklady aplikacĂ byly ovÄĆeny pomocĂ PSpice simulacĂ s vyuĆŸitĂm parametrĆŻ technologie 0,18 m TSMC CMOS. Pro ilustraci pĆesnĂ©ho a ĂșÄinnĂ©ho chovĂĄnĂ struktur je v disertaÄnĂ prĂĄci zahrnuto velkĂ© mnoĆŸstvĂ simulaÄnĂch vĂœsledkĆŻ.The dissertation thesis is aiming at examining the most common methods adopted by analog circuits' designers in order to achieve low voltage (LV) low power (LP) configurations. The capability of LV LP operation could be achieved either by developed technologies or by design techniques. The thesis is concentrating upon design techniques, especially the nonâconventional ones which are bulkâdriven (BD), floatingâgate (FG), quasiâfloatingâgate (QFG), bulkâdriven floatingâgate (BDâFG) and bulkâdriven quasiâfloatingâgate (BDâQFG) techniques. The thesis also looks at ways of implementing structures of wellâknown and modern active elements operating in voltageâ, currentâ, and mixedâmode such as operational transconductance amplifier (OTA), second generation current conveyor (CCII), fullyâdifferential second generation current conveyor (FBâCCII), fullyâbalanced differential difference amplifier (FBâDDA), voltage differencing transconductance amplifier (VDTA), currentâcontrolled current differencing buffered amplifier (CCâCDBA) and current feedback operational amplifier (CFOA). In order to confirm the functionality and behavior of these configurations and elements, they have been utilized in application examples such as diodeâless rectifier and inductance simulations, as well as lowâpass, bandâpass and universal filters. All active elements and application examples have been verified by PSpice simulator using the 0.18 m TSMC CMOS parameters. Sufficient numbers of simulated plots are included in this thesis to illustrate the precise and strong behavior of structures.
Low-power CMOS front-ends for wireless personal area networks
The potential of implementing subthreshold radio frequency circuits in deep sub-micron CMOS technology was investigated for developing low-power front-ends for wireless personal area network (WPAN) applications. It was found that the higher transconductance to bias current ratio in weak inversion could be exploited in developing low-power wireless front-ends, if circuit techniques are employed to mitigate the higher device noise in subthreshold region. The first fully integrated subthreshold low noise amplifier was demonstrated in the GHz frequency range requiring only 260 ÎŒW of power consumption. Novel subthreshold variable gain stages and down-conversion mixers were developed.
A 2.4 GHz receiver, consuming 540 ÎŒW of power, was implemented using a new subthreshold mixer by replacing the conventional active low noise amplifier by a series-resonant passive network that provides both input matching and voltage amplification. The first fully monolithic subthreshold CMOS receiver was also implemented with integrated subthreshold quadrature LO (Local Oscillator) chain for 2.4 GHz WPAN applications. Subthreshold operation, passive voltage amplification, and various low-power circuit techniques such as current reuse, stacking, and differential cross coupling were combined to lower the total power consumption to 2.6 mW.
Extremely compact resistive feedback CMOS low noise amplifiers were presented as a cost-effective alternative to narrow band LNAs using high-Q inductors. Techniques to improve linearity and reduce power consumption were presented. The combination of high linearity, low noise figure, high broadband gain, extremely small die area and low power consumption made the proposed LNA architecture a compelling choice for many wireless applications.Ph.D.Committee Chair: Laskar, Joy; Committee Member: Chakraborty, Sudipto; Committee Member: Chang, Jae Joon; Committee Member: Divan, Deepakraj; Committee Member: Kornegay, Kevin; Committee Member: Tentzeris, Emmanoui
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Recursive receiver down-converters with multiband feedback and gain-reuse for low-power applications
Power minimization in wireless transceivers has become increasingly critical in recent years with the emergence of standards for short-distance applications in the 900 MHz and 2.4 GHz industrial, scientific and medical (ISM) radio bands. The demand for long battery life and better portability in such applications has led to extensive research on low power radio architectures. This dissertation introduces receiver topologies for low-power systems and presents a theoretical performance analysis of the topologies. Two fully integrated receiver down-converters that demonstrate the concept are implemented in a 0.13-[mu]m CMOS technology. These topologies employ merged mixers and IF amplifiers in order to reduce power dissipation for a given dynamic range performance. In the described topologies, the input stage of a mixer is used to simultaneously provide conversion gain and baseband amplification. This is achieved by applying the down-converted IF signal to input of the mixer. Consequently, the effective conversion gain of the design is greatly enhanced with current requirement primarily determined by the input transconductor. Potential degradation mechanisms related to instability and second-order distortion are identified and solved by the use of appropriate circuit techniques. Noise and linearity performance of the down-converters is analyzed and compared to that of conventional cascaded design counterparts. The potential for enhancement of IIP3 performance through cancellation of nonlinear products is discussed. Potential extensions of the above work including feedback-based architectures that exploit multiple loops for further maximizing the power efficiency of receiver front-ends are also presented.Electrical and Computer Engineerin
Electronically Tunable Current-mode High-order Ladder Low-pass Filters Based on CMOS Technology
This paper describes the design of current mode low-pass ladder filters based on CMOS technology. The filters are derived from passive RLC ladder filter prototypes using new CMOS lossy and lossless integrators. The all-pole and Elliptic approximations are used in the proposed low-pass filter realizations. The proposed two types of filter can be electronically tuned between 10kHz and 100MHz through bias current from 0.03”A to 300”A. The proposed filters use 1.5 V power supply with 3 mW power consumption at 300 ”A bias current. The proposed filters are resistorless, use grounded capacitors and are suitable for further integration. The total harmonic distortion (THD) of the low-pass filters is less than 1% over the operating frequency range. PSPICE simulation results, obtained by using TSMC 0.18”m technology, confirm the presented theory
Novel active function blocks and their applications in frequency filters and quadrature oscillators
KmitoÄtovĂ© filtry a sinusoidnĂ oscilĂĄtory jsou lineĂĄrnĂ elektronickĂ© obvody, kterĂ© jsou pouĆŸĂvĂĄny v ĆĄirokĂ© oblasti elektroniky a jsou zĂĄkladnĂmi stavebnĂmi bloky v analogovĂ©m zpracovĂĄnĂ signĂĄlu. V poslednĂ dekĂĄdÄ pro tento ĂșÄel bylo prezentovĂĄno velkĂ© mnoĆŸstvĂ stavebnĂch funkÄnĂch blokĆŻ. V letech 2000 a 2006 na Ăstavu telekomunikacĂ, VUT v BrnÄ byly definovĂĄny univerzĂĄlnĂ proudovĂœ konvejor (UCC) a univerzĂĄlnĂ napÄt'ovĂœ konvejor (UVC) a vyrobeny ve spoluprĂĄci s firmou AMI Semiconductor Czech, Ltd. OvĆĄem, stĂĄle existuje poĆŸadavek na vĂœvoj novĂœch aktivnĂch prvkĆŻ, kterĂ© nabĂzejĂ novĂ© vĂœhody. HlavnĂ pĆĂnos prĂĄce proto spoÄĂvĂĄ v definici dalĆĄĂch pĆŻvodnĂch aktivnĂch stavebnĂch blokĆŻ jako jsou differential-input buffered and transconductance amplifier (DBTA), current follower transconductance amplifier (CFTA), z-copy current-controlled current inverting transconductance amplifier (ZC-CCCITA), generalized current follower differential input transconductance amplifier (GCFDITA), voltage gain-controlled modified current-feedback operational amplifier (VGC-MCFOA), a minus-type current-controlled third-generation voltage conveyor (CC-VCIII-). PomocĂ navrĆŸenĂœch aktivnĂch stavebnĂch blokĆŻ byly prezentovĂĄny pĆŻvodnĂ zapojenĂ fĂĄzovacĂch ÄlĂĄnkĆŻ prvnĂho ĆĂĄdu, univerzĂĄlnĂ filtry druhĂ©ho ĆĂĄdu, ekvivalenty obvodu typu KHN, inverznĂ filtry, aktivnĂ simulĂĄtory uzemnÄnĂ©ho induktoru a kvadraturnĂ sinusoidnĂ oscilĂĄtory pracujĂcĂ v proudovĂ©m, napÄt'ovĂ©m a smĂĆĄenĂ©m mĂłdu. ChovĂĄnĂ navrĆŸenĂœch obvodĆŻ byla ovÄĆena simulacĂ v prostĆedĂ SPICE a ve vybranĂœch pĆĂpadech experimentĂĄlnĂm mÄĆenĂm.Frequency filters and sinusoidal oscillators are linear electric circuits that are used in wide area of electronics and also are the basic building blocks in analogue signal processing. In the last decade, huge number of active building blocks (ABBs) were presented for this purpose. In 2000 and 2006, the universal current conveyor (UCC) and the universal voltage conveyor (UVC), respectively, were designed at the Department of Telecommunication, BUT, Brno, and produced in cooperation with AMI Semiconductor Czech, Ltd. There is still the need to develop new active elements that offer new advantages. The main contribution of this thesis is, therefore, the definition of other novel ABBs such as the differential-input buffered and transconductance amplifier (DBTA), the current follower transconductance amplifier (CFTA), the z-copy current-controlled current inverting transconductance amplifier (ZC-CCCITA), the generalized current follower differential input transconductance amplifier (GCFDITA), the voltage gain-controlled modified current-feedback operational amplifier (VGC-MCFOA), and the minus-type current-controlled third-generation voltage conveyor (CC-VCIII-). Using the proposed ABBs, novel structures of first-order all-pass filters, second-order universal filters, KHN-equivalent circuits, inverse filters, active grounded inductance simulators, and quadrature sinusoidal oscillators working in the current-, voltage-, or mixed-mode are presented. The behavior of the proposed circuits has been verified by SPICE simulations and in selected cases also by experimental measurements.
Circuits for Analog Signal Processing Employing Unconventional Active Elements
DisertaÄnĂ prĂĄce se zabĂœvĂĄ zavĂĄdÄnĂm novĂœch struktur modernĂch aktivnĂch prvkĆŻ pracujĂcĂch v napÄĆ„ovĂ©m, proudovĂ©m a smĂĆĄenĂ©m reĆŸimu. FunkÄnost a chovĂĄnĂ tÄchto prvkĆŻ byly ovÄĆeny prostĆednictvĂm SPICE simulacĂ. V tĂ©to prĂĄci je zahrnuta Ćada simulacĂ, kterĂ© dokazujĂ pĆesnost a dobrĂ© vlastnosti tÄchto prvkĆŻ, pĆiÄemĆŸ velkĂœ dĆŻraz byl kladen na to, aby tyto prvky byly schopny pracovat pĆi nĂzkĂ©m napĂĄjecĂm napÄtĂ, jelikoĆŸ poptĂĄvka po pĆenosnĂœch elektronickĂœch zaĆĂzenĂch a implantabilnĂch zdravotnickĂœch pĆĂstrojĂch stĂĄle roste. Tyto pĆĂstroje jsou napĂĄjeny bateriemi a k tomu, aby byla prodlouĆŸena jejich ĆŸivotnost, trend navrhovĂĄnĂ analogovĂœch obvodĆŻ smÄĆuje k stĂĄle vÄtĆĄĂmu sniĆŸovĂĄnĂ spotĆeby a napĂĄjecĂho napÄtĂ. HlavnĂm pĆĂnosem tĂ©to prĂĄce je nĂĄvrh novĂœch CMOS struktur: CCII (Current Conveyor Second Generation) na zĂĄkladÄ BD (Bulk Driven), FG (Floating Gate) a QFG (Quasi Floating Gate); DVCC (Differential Voltage Current Conveyor) na zĂĄkladÄ FG, transkonduktor na zĂĄkladÄ novĂ© techniky BD_QFG (Bulk Driven_Quasi Floating Gate), CCCDBA (Current Controlled Current Differencing Buffered Amplifier) na zĂĄkladÄ GD (Gate Driven), VDBA (Voltage Differencing Buffered Amplifier) na zĂĄkladÄ GD a DBeTA (Differential_Input Buffered and External Transconductance Amplifier) na zĂĄkladÄ BD. DĂĄle je uvedeno nÄkolik zajĂmavĂœch aplikacĂ uĆŸĂvajĂcĂch vĂœĆĄe jmenovanĂ© prvky. ZĂskanĂ© vĂœsledky simulacĂ odpovĂdajĂ teoretickĂœm pĆedpokladĆŻm.The dissertation thesis deals with implementing new structures of modern active elements working in voltage_, current_, and mixed mode. The functionality and behavior of these elements have been verified by SPICE simulation. Sufficient numbers of simulated plots are included in this thesis to illustrate the precise and strong behavior of those elements. However, a big attention to implement active elements by utilizing LV LP (Low Voltage Low Power) techniques is given in this thesis. This attention came from the fact that growing demand of portable electronic equipments and implantable medical devices are pushing the development towards LV LP integrated circuits because of their influence on batteries lifetime. More specifically, the main contribution of this thesis is to implement new CMOS structures of: CCII (Current Conveyor Second Generation) based on BD (Bulk Driven), FG (Floating Gate) and QFG (Quasi Floating Gate); DVCC (Differential Voltage Current Conveyor) based on FG; Transconductor based on new technique of BD_QFG (Bulk Driven_Quasi Floating Gate); CCCDBA (Current Controlled Current Differencing Buffered Amplifier) based on conventional GD (Gate Driven); VDBA (Voltage Differencing Buffered Amplifier) based on GD. Moreover, defining new active element i.e. DBeTA (Differential_Input Buffered and External Transconductance Amplifier) based on BD is also one of the main contributions of this thesis. To confirm the workability and attractive properties of the proposed circuits many applications were exhibited. The given results agree well with the theoretical anticipation.
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