Performance Evaluation of an IEEE 802.15.4a Physical Layer with Energy Detection and Multi-User Interference

We evaluate the performance of an IEEE 802.15.4a ultra-wide band (UWB) physical layer, with an energy-detection receiver, in the presence of multi-user interference (MUI). A complete packet based system is considered. We take into account packet detection and timing acquisition, the estimation of the power delay profile of the channel, and the recovery of the encoded payload. Energy detectors are known to have a low implementation complexity and to allow for avoiding the complex channel estimation needed by a Rake receiver. However, our results show that MUI severely degrades the performance of the energy detection receiver, even at low traffic rate. We demonstrate that using an IEEE 802.15.4a compliant energy detection receiver significantly diminishes one of the most appealing benefits of UWB, namely its robustness to MUI and thus the possibility to allow parallel transmissions. We further find that timing acquisition and data decoding both equally suffer from MUI

A Mixed-Signal Demodulator for a Low-Complexity IR-UWB Receiver: Methodology, Simulation and Design

This works presents an integrated 0.18μm CMOS 2-PPM demodulator based on a switched capacitor network for an Energy Detection Impulse-Radio UWB receiver. The circuit has been designed using a top-down methodology that allows to discover the impact of low-level non-idealities on system-level performance. Through the use of a mixed signal simulation environment, performance figures have been obtained which helped evaluate the influence at system-level of the non-idealities of the most critical block. Results show that the circuit allows the replacement of the ADC typically employed in Energy Detection receivers and provides about infinite equivalent quantization resolution. The demodulator achieves 190 pJ/bit at 1.8V

Ultra-Low-Power Uwb Impulse Radio Design: Architecture, Circuits, And Applications

Recent advances in home healthcare, environmental sensing, and low power computing have created a need for wireless communication at very low power for low data rate applications. Due to higher energy/bit requirements at lower data -rate, achieving power levels low enough to enable long battery lifetime (~10 years) or power-harvesting supplies have not been possible with traditional approaches. Dutycycled radios have often been proposed in literature as a solution for such applications due to their ability to shut off the static power consumption at low data rates. While earlier radio nodes for such systems have been proposed based on a type of sleepwake scheduling, such implementations are still power hungry due to large synchronization uncertainty (~1[MICRO SIGN]s). In this dissertation, we utilize impulsive signaling and a pulse-coupled oscillator (PCO) based synchronization scheme to facilitate a globally synchronized wireless network. We have modeled this network over a widely varying parameter space and found that it is capable of reducing system cost as well as providing scalability in wireless sensor networks. Based on this scheme, we implemented an FCC compliant, 3-5GHz, timemultiplexed, dual-band UWB impulse radio transceiver, measured to consume only 20[MICRO SIGN]W when the nodes are synchronized for peer-peer communication. At the system level the design was measured to consume 86[MICRO SIGN]W of power, while facilitating multi- hop communication. Simple pulse-shaping circuitry ensures spectral efficiency, FCC compliance and ~30dB band-isolation. Similarly, the band-switchable, ~2ns turn-on receiver implements a non-coherent pulse detection scheme that facilitates low power consumption with -87dBm sensitivity at 100Kbps. Once synchronized the nodes exchange information while duty-cycling, and can use any type of high level network protocols utilized in packet based communication. For robust network performance, a localized synchronization detection scheme based on relative timing and statistics of the PCO firing and the timing pulses ("sync") is reported. No active hand-shaking is required for nodes to detect synchronization. A self-reinforcement scheme also helps maintain synchronization even in the presence of miss-detections. Finally we discuss unique ways to exploit properties of pulse coupled oscillator networks to realize novel low power event communication, prioritization, localization and immediate neighborhood validation for low power wireless sensor applications

Dual-band FSK receiver and building block design for UWB impulse radio

Master'sMASTER OF ENGINEERIN

A high speed image transmission system for ultra-wideband wireless links

Thesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2009.Includes bibliographical references (p. 97-98).Ultra-wideband (UWB) communication is an emerging technology that offers short range, high data rate wireless transmission, with low power consumption and low consumer cost. Operating in the 3.1 GHz - 10.6 GHz frequency band with bandwidth above 500 MHz, it is an overlay technology that can co-exist with other narrowband services in the same frequency range, thus alleviating the problem of over-crowded spectrum. In particular, pulse-based UWB technologies allows for building of ultra-low power, medium- to long-range transceivers, at the expense of data transmission rate. This thesis presents a pulse-based, non-coherent UWB wireless image transmission platform. The system features a one-way wireless link. On the transmitter side, a host PC processes the images into transmittable packets in MATLAB, and sends them to the UWB radio through an interfacing FPGA module. On the receiver side, the UWB receiver radio receivers the packets, decodes the bits, and passes them back to the receiver host PC through another interfacing FPGA module. The receiver host PC collects the decoded bits and reconstructs the original image in MATLAB. The unidirectional wireless channel is complemented by a feedback path, provided through internet connection between the two host PCs. To improve usability, graphical user interfaces are setup on both host PCs. The overall system transmits 120 x 160 uncompressed bitmap images. It achieves a maximum payload data rate of 8 Mb/s.(cont.) It is able to transmit data reliably, with above 95% packet reception rate and below 2 x 10-5 bit error rate, for distances up to 16 meters. At 16 meters, the system has a maximum transmission data rate of 2.67 Mbps.by Helen He Liang.M.Eng

An all-digital transmitter for pulsed ultra-wideband communication

Thesis (S.M.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2008.Includes bibliographical references (p. 91-96).Applications like sensor networks, medical monitoring, and asset tracking have led to a demand for energy-efficient and low-cost wireless transceivers. These types of applications typically require low effective data rates, thus providing an opportunity to employ simple modulation schemes and aggressive duty-cycling. Due to their inherently duty-cycled nature, pulse-based Ultra-Wideband (UWB) systems are amenable to low-power operation by shutting off circuitry during idle mode between pulses. Furthermore, the use of non-coherent UWB signaling greatly simplifies both transmitter and receiver implementations, offering additional energy savings. This thesis presents an all-digital transmitter designed for a non-coherent pulsed UWB system. By exploiting relaxed center frequency tolerances in non-coherent wideband communication, the transmitter synthesizes UWB pulses from an energy efficient, single-ended digital ring oscillator. Dual capacitively-coupled digital power amplifiers (PAs) are used in tandem to generate bipolar phase modulated pulses for spectral scrambling purposes. By maintaining opposite common modes at the output of these PAs during idle mode (i.e. when no pulses are being transmitted), low frequency turn-on and turn-off transients typically associated with single-ended digital circuits driving single-ended antennas are attenuated by up to 12dB. Furthermore, four level digital pulse shaping is employed to attenuate RF side lobes by up to 20dB. The resulting dual power amplifiers achieve FCC compliant operation in the 3.5, 4.0, and 4.5GHz IEEE 802.15.4a bands without the use of any off-chip filters or large passive components. The transmitter is fabricated in a 90nm CMOS process and requires a core area of 0.07mm2. The entirely digital architecture consumes zero static bias current, resulting in an energy efficiency of 17.5pJ/pulse at data rates up to 15.6Mbps.by Patrick Philip Mercier.S.M

Communications in the observation limited regime

Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2009.Cataloged from PDF version of thesis.Includes bibliographical references (p. 141-145).We consider the design of communications systems when the principal cost is observing the channel, as opposed to transmit energy per bit or spectral efficiency. This is motivated by energy constrained communications devices where sampling the signal, rather than transmitting or processing it, dominates energy consumption. We show that sequentially observing samples with the maximum a posteriori entropy can reduce observation costs by close to an order of magnitude using a (24,12) Golay code. This is the highest performance reported over the binary input AWGN channel, with or without feedback, for this blocklength. Sampling signal energy, rather than amplitude, lowers circuit complexity and power dissipation significantly, but makes synchronization harder. We show that while the distance function of this non-linear coding problem is intractable in general, it is Euclidean at vanishing SNRs, and root Euclidean at large SNRs. We present sequences that maximize the error exponent at low SNRs under the peak power constraint, and under all SNRs under an average power constraint. Some of our new sequences are an order of magnitude shorter than those used by the 802.15.4a standard.(cont.) In joint work with P. Mercier and D. Daly, we demonstrate the first energy sampling wireless modem capable of synchronizing to within a ns, while sampling energy at only 32 Msamples per second, and using no high speed clocks. We show that traditional, minimum distance classifiers may be highly sensitive to parameter estimation errors, and propose robust, computationally efficient alternatives. We challenge the prevailing notion that energy samplers must accurately shift phase to synchronize with high precision.by Manish Bhardwaj.Ph.D

Near-field baseband communication system for use in biomedical implants

This thesis introduces the reader to the near-field baseband pulse radio communication for biomedical implants. It details the design and implementation of the complete communication system with a particular emphasis on the antenna structure and waveform coding that is compatible with this particular technology. The wireless communication system has great employability in small pill-sized biomedical diagnostic devices offering the advantages of low power consumption and easy integration with SoC and lab-in-a-pill technologies. The greatest challenge was the choice of antenna that had to be made to effectively transmit the pulses. A systematic approach has been carried out in arriving at the most suitable antenna for efficient emanation of pulses and the fields around it are analysed electromagnetically using a commercially available software. A magnetic antenna can be used to transmit the information from inside a human body to the outside world. The performance of the above antenna was evaluated in a salt solution of different concentrations which is similar to a highly conductive lossy medium like a human body. Near-field baseband pulse transmission is a waveform transmission scheme wherein the pulse shape is crucial for decoding information at the receiver. This demands a new approach to the antenna design, both at the transmitter and the receiver. The antenna had to be analysed in the time-domain to know its effects on the pulse and an expression for the antenna bandwidth has been proposed in this thesis. The receiving antenna should be able to detect very short pulses and while doing so has to also maintain the pulse shape with minimal distortion. Different loading congurations were explored to determine the most feasible one for receiving very short pulses. Return-to-zero (RZ), Non-return-zero (NRZ) and Manchester coded pulse waveforms were tested for their compatibility and performance with the near-field baseband pulse radio communication. It was concluded that Manchester coded waveform are perfectly suited for this particular near-field communication technology. Pulse interval modulation was also investigated and the findings suggested that it was easier to implement and had a high throughput rate too. A simple receiver algorithm has been suggested and practically tested on a digital signal processor. There is further scope for research to develop complex signal processing algorithms at the receiver

Digital ADCs and ultra-wideband RF circuits for energy constrained wireless applications by Denis Clarke Daly.

Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2009.Cataloged from PDF version of thesis.Includes bibliographical references (p. 173-183).Ongoing advances in semiconductor technology have enabled a multitude of portable, low power devices like cellular phones and wireless sensors. Most recently, as transistor device geometries reach the nanometer scale, transistor characteristics have changed so dramatically that many traditional circuits and architectures are no longer optimal and/or feasible. As a solution, much research has focused on developing 'highly digital' circuits and architectures that are tolerant of the increased leakage, variation and degraded voltage headrooms associated with advanced CMOS processes. This thesis presents several highly digital, mixed-signal circuits and architectures designed for energy constrained wireless applications. First, as a case study, a highly digital, voltage scalable flash ADC is presented. The flash ADC, implemented in 0.18 [mu]m CMOS, leverages redundancy and calibration to achieve robust operation at supply voltages from 0.2 V to 0.9 V. Next, the thesis expands in scope to describe a pulsed, noncoherent ultra-wideband transceiver chipset, implemented in 90 nm CMOS and operating in the 3-to-5 GHz band. The all-digital transmitter employs capacitive combining and pulse shaping in the power amplifier to meet the FCC spectral mask without any off-chip filters. The noncoherent receiver system-on-chip achieves both energy efficiency and high performance by employing simple amplifier and ADC structures combined with extensive digital calibration. Finally, the transceiver chipset is integrated in a complete system for wireless insect flight control.(cont.) Through the use of a flexible PCB and 3D die stacking, the total weight of the electronics is kept to 1 g, within the carrying capacity of an adult Manduca sexta moth. Preliminary wireless flight control of a moth in a wind tunnel is demonstrated.Ph.D

Energy-efficient analog-to-digital conversion for ultra-wideband radio

Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2007.Includes bibliographical references (p. 207-222).In energy constrained signal processing and communication systems, a focus on the analog or digital circuits in isolation cannot achieve the minimum power consumption. Furthermore, in advanced technologies with significant variation, yield is traditionally achieved only through conservative design and a sacrifice of energy efficiency. In this thesis, these limitations are addressed with both a comprehensive mixed-signal design methodology and new circuits and architectures, as presented in the context of an analog-to-digital converter (ADC) for ultra-wideband (UWB) radio. UWB is an emerging technology capable of high-data-rate wireless communication and precise locationing, and it requires high-speed (>500MS/s), low-resolution ADCs. The successive approximation register (SAR) topology exhibits significantly reduced complexity compared to the traditional flash architecture. Three time-interleaved SAR ADCs have been implemented. At the mixed-signal optimum energy point, parallelism and reduced voltage supplies provide more than 3x energy savings. Custom control logic, a new capacitive DAC, and a hierarchical sampling network enable the high-speed operation. Finally, only a small amount of redundancy, with negligible power penalty, dramatically improves the yield of the highly parallel ADC in deep sub-micron CMOS.by Brian P. Ginsburg.Ph.D