Analog-to-digital converter circuit and system design to improve with CMOS scaling

textThere is a need to rethink the design of analog/mixed-signal circuits to be viable in state-of-the-art nanometer-scale CMOS processes due to the hostile environment they create for analog circuits. Reduced supply voltages and smaller capacitances are beneficial to circuit speed and digital circuit power efficiency; however, these changes along with smaller dimensions and close coupling of fast-switching digital circuits have made high-accuracy voltage domain analog processing increasingly difficult. In this work, techniques to improve analog-to-digital converters (ADC) for nanometer-scale processes are explored. First, I propose a mostly-digital time-based oversampling delta-sigma (∆Σ) ADC architecture. This system uses time, rather than voltage, as the analog variable for its quantizer, where the noise shaping process is realized by modulating the width of a variable-width digital "pulse." The merits of this architecture render it not only viable to scaling, but also enable improved circuit performance with ever-increasing time resolution of scaled CMOS processes. This is in contrast to traditional voltage-based analog circuit design, whose performance generally decreases with scaling due to increasingly higher voltage uncertainty due to supply voltage reduction and short-channel effects. In conjunction with Dr. Woo Young Jung while he was a Ph.D. student at The University of Texas at Austin, two prototype implementations of the proposed architecture were designed and fabricated in TSMC 180 nm CMOS and IBM 45 nm Silicon-On-Insulator (SOI) processes. The prototype ADCs demonstrate that the architecture can achieve bandwidths of 5-20 MHz and ∼50 dB SNR with very small area. The first generation ADC core occupies an area of only 0.0275 mm² , while the second generation ADC core occupies 0.0192 mm² . The two prototypes can be categorized as some of the smallestarea modulators in the literature. Second, I analyze the measured results of the prototype ADC chips, and determine the source for the harmonic distortion. I then demonstrate a digital calibration algorithm that sufficiently mitigates the distortion. This calibration approach falls in the general philosophy of digitally-assisted analog systems. In this philosophy, digital calibration and post-correction are favored over traditional analog solutions, in which there is a high cost to the analog solution either in complexity, power, or area.Electrical and Computer Engineerin

Time resolved single photon imaging in Nanometer Scale CMOS technology

Time resolved imaging is concerned with the measurement of photon arrival time. It has a wealth of emerging applications including biomedical uses such as fluorescence lifetime microscopy and positron emission tomography, as well as laser ranging and imaging in three dimensions. The impact of time resolved imaging on human life is significant: it can be used to identify cancerous cells in-vivo, how well new drugs may perform, or to guide a robot around a factory or hospital. Two essential building blocks of a time resolved imaging system are a photon detector capable of sensing single photons, and fast time resolvers that can measure the time of flight of light to picosecond resolution. In order to address these emerging applications, miniaturised, single-chip, integrated arrays of photon detectors and time resolvers must be developed with state of the art performance and low cost. The goal of this research is therefore the design, layout and verification of arrays of low noise Single Photon Avalanche Diodes (SPADs) together with high resolution Time-Digital Converters (TDCs) using an advanced silicon fabrication process. The research reported in this Thesis was carried out as part of the E.U. funded Megaframe FP6 Project. A 32x32 pixel, one million frames per second, time correlated imaging device has been designed, simulated and fabricated using a 130nm CMOS Imaging process from ST Microelectronics. The imager array has been implemented together with required support cells in order to transmit data off chip at high speed as well as providing a means of device control, test and calibration. The fabricated imaging device successfully demonstrates the research objectives. The Thesis presents details of design, simulation and characterisation results of the elements of the Megaframe device which were the author’s own work. Highlights of the results include the smallest and lowest noise SPAD devices yet published for this class of fabrication process and an imaging array capable of recording single photon arrivals every microsecond, with a minimum time resolution of fifty picoseconds and single bit linearity

Design of CMOS Digital Silicon Photomultipliers with ToF for Positron Emission Tomography

This thesis presents a contribution to the design of single-photon detectors for medical imaging. Specifically, the focus has been on the development of a pixel capable of single-photon counting in CMOS technology, and the associated sensor thereof. These sensors can work under low light conditions and provide timing information to determine the time-stamp of the incoming photons. For instance, this is particularly attractive for applications that rely either on time-of-flight measurements or on exponential decay determination of the light source, like positron emission tomography or fluorescence-lifetime imaging, respectively. This thesis proposes the study of the pixel architecture to optimize its performance in terms of sensitivity, linearity and signal to noise ratio. The design of the pixel has followed a bottom-up approach, taking care of the smallest building block and studying how the different architecture choices affect performance. Among the various building blocks needed, special emphasis has been placed on the following: • the Single-Photon Avalanche Diode (SPAD), a photodiode able to detect photons one by one; • the front-end circuitry of this diode, commonly called quenching and recharge circuit; • the Time-to-Digital Converter (TDC), which determines the timing performance of the pixel. The proposed architectural exploration provides a comprehensive insight into the design space of the pixel, allowing to determine the optimum design points in terms of sensor sensitivity, linearity or signal to noise ratio, thus helping designers to navigate through non-straightforward trade-offs. The proposed TDC is based on a voltage-controlled ring oscillator, since this architecture provides moderate time resolutions while keeping the footprint, the power, and conversion time relatively small. Two pseudo-differential delay stages have been studied, one with cross-coupled PMOS transistors and the other with cross-coupled inverters. Analytical studies and simulations have shown that cross-coupled inverters are the most appropriate to implement the TDC because they achieve better time resolution with smaller energy per conversion than cross-coupled PMOS transistor stages. A 1.3×1.3 mm2 pixel has been implemented in an 110 nm CMOS image sensor technology, to have the benefits of sub-micron technologies along with the cleanliness of CMOS image sensor technologies. The fabricated chips have been used to characterize the single-photon avalanche diodes. The results agree with expectations: a maximum photon detection probability of 46 % and a median dark count rate of 0.4 Hz/µm2 with an excess voltage of 3 V. Furthermore, the characterization of the TDC shows that the time resolution is below 100 ps, which agrees with post-layout simulations. The differential non-linearity is ±0.4LSB, and the integral non-linearity is ±6.1LSB. Photoemission occurs during characterization - an indication that the avalanches are not quenched properly. The cause of this has been identified to be in the design of the SPAD and the quenching circuit. SPADs are sensitive devices which maximum reverse current must be well defined and limited by the quenching circuit, otherwise unwanted effects like excessive cross-talk, noise, and power consumption may happen. Although this issue limits the operation of the implemented pixel, the information obtained during the characterization will help to avoid mistakes in future implementations

A GEM based Time Projection Chamber with pixel readout

The large number of measured track points and the low material budget make a Time Projection Chamber (TPC) the ideal tracking device for particle flow optimized experiments. A highly segmented readout scheme, based on GEMs (Gas Electron Multipliers) or Micromegas, offers best performance. The potential of charge collection on the bare pixels of a CMOS chip placed directly underneath a short-spaced triple GEM stack is evaluated in a TPC prototype with 26 cm drift distance. The employed Timepix ASIC features 256x256 pixels with 55μm edge length. These allow for characterization of electron avalanches started by individual primary electrons. Down to small drift distances, where the pitch of the GEM holes (140 μm) becomes dominant, the spatial resolution of this pixel TPC is limited only by single electron diffusion. For the readout of next generation gaseous detectors, development of an improved ASIC with 65 k pixels, offering simultaneous charge and arrival time measurements with nanosecond accuracy, is pursued.Eine GEM basierte Zeitprojektionskammer mit Pixelauslese Aufgrund der großen Zahl der detektierten Spurpunkte sowie wegen der außerordentlich geringen Materialbelegung ist eine Zeitprojektionskammer (Time Projection Chamber / TPC) der ideale Spurdetektor für Experimente, die das Teilchenflusskonzept verfolgen. Die beste Detektorleistung wird mit einer sehr fein segmentierten Auslesestruktur in Verbindung mit GEMs (engl. Gas Electron Multipliers) oder Micromegas erreicht. Die direkte Ladungssammlung auf den Pixeln eines CMOS Chips wird mit einem 26 cm langen TPC-Prototypen untersucht. In diesem ist ein Timepix ASIC mit 25x256 Pixeln mit je 55μm Kantenlänge ohne Halbleitersensor direkt unter einem Stapel aus drei GEMs platziert. Die geringe Pixelgröße ermöglicht es, die Strukturen von, durch einzelne Primärelektronen verursachten, Elektronenlawinen aufzulösen. Bis hin zu sehr kleinen Driftdistanzen, bei denen der Abstand der GEM-Löcher (140 μm) limitierend wird, ist die räumliche Auflösung dieser Pixel-TPC nur durch die Diffusion der einzelnen Primärelektronen beschränkt. Für die Auslese zukünftiger gasbasierter Teilchendetektoren wird die Entwicklung eines verbesserten Mikrochips mit 65 000 Pixeln zur gleichzeitigen Ladungs- und Ankunftszeitmessung voran getrieben

Muon (g-2) Technical Design Report

The Muon (g-2) Experiment, E989 at Fermilab, will measure the muon anomalous magnetic moment a factor-of-four more precisely than was done in E821 at the Brookhaven National Laboratory AGS. The E821 result appears to be greater than the Standard-Model prediction by more than three standard deviations. When combined with expected improvement in the Standard-Model hadronic contributions, E989 should be able to determine definitively whether or not the E821 result is evidence for physics beyond the Standard Model. After a review of the physics motivation and the basic technique, which will use the muon storage ring built at BNL and now relocated to Fermilab, the design of the new experiment is presented. This document was created in partial fulfillment of the requirements necessary to obtain DOE CD-2/3 approval

GSI Scientific Report 2016

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Advanced Photonic Sciences

The new emerging field of photonics has significantly attracted the interest of many societies, professionals and researchers around the world. The great importance of this field is due to its applicability and possible utilization in almost all scientific and industrial areas. This book presents some advanced research topics in photonics. It consists of 16 chapters organized into three sections: Integrated Photonics, Photonic Materials and Photonic Applications. It can be said that this book is a good contribution for paving the way for further innovations in photonic technology. The chapters have been written and reviewed by well-experienced researchers in their fields. In their contributions they demonstrated the most profound knowledge and expertise for interested individuals in this expanding field. The book will be a good reference for experienced professionals, academics and researchers as well as young researchers only starting their carrier in this field