Binary Turbo Coding with Interblock Memory

[[abstract]]We investigate the performance of binary codes T constructed from turbo coding with interblock memory. The encoding of T is implemented by serially concatenating a multiplexer, a multilevel delay processor, and a signal mapper to the encoder of a conventional binary turbo code C. With such a construction, in T, there is some irregularity for the code bits in C. To provide more variety of irregularity, we can construct TC which is obtained by passing only a fraction of C through a multilevel delay processor and a signal mapper. We propose iterative decoding between adjacent codewords (IDAC), which provides error performance much better than the iterative decoding within a single codeword (IDSC). Simulation shows that T can have a lower error floor than C for either short or long code length. In some cases, TC can provide better error floors and waterfall regions than C.[[fileno]]2030133030003[[department]]電機工程學

Successive interference cancellation schemes for time-reversal space-time block codes

In this paper, we propose two simple signal detectors that are based on successive interference cancellation (SIC) for time-reversal space-time block codes to combat intersymbol interference in frequency-selective fading environments. The main idea is to treat undetected symbols and noise together as Gaussian noise with matching mean and variance and use the already-detected symbols to help current signal recovery. The first scheme is a simple SIC signal detector whose ordering is based on the channel powers. The second proposed SIC scheme, which is denoted parallel arbitrated SIC (PA-SIC), is a structure that concatenates in parallel a certain number of SIC detectors with different ordering sequences and then combines the soft output of each individual SIC to achieve performance gains. For the proposed PA-SIC, we describe the optimal ordering algorithm as a combinatorial problem and present a low-complexity ordering technique for signal decoding. Simulations show that the new schemes can provide a performance that is very close to maximum-likelihood sequence estimation (MLSE) decoding under time-invariant conditions. Results for frequency-selective and doubly selective fading channels show that the proposed schemes significantly outperform the conventional minimum mean square error-(MMSE) like receiver and that the new PA-SIC performs much better than the proposed conventional SIC and is not far in performance from the MLSE. The computational complexity of the SIC algorithms is only linear with the number of transmit antennas and transmission rates, which is very close to the MMSE and much lower than the MLSE. The PA-SIC also has a complexity that is linear with the number of SIC components that are in parallel, and the optimum tradeoff between performance and complexity can be easily determined according to the number of SIC detectors

A turbo FDE technique for reduced-CP SC-based block transmission systems

For conventional cyclic-prefix (CP)-assisted block transmission systems, the CP length is selected on the basis of the expected maximum delay spread. With regard to single-carrier (SC)-based block transmission implementations, a full-length CP is recommendable, since it allows good performances through the use of simple frequency-domain equalization (FDE) techniques. In this letter, a soft-decision-directed correction (SDDC)-aided turbo FDE technique is presented for reduced-CP SC-based block transmission systems using conventional frame structures. The relations with some already known iterative FDE techniques are established, and a set of performance results is reported and discussed. The advantages of the proposed approach are emphasized, namely, the possibility of approximately achieving (besides the obvious bandwidth efficiency gain) the maximum power efficiency gain that a strong CP reduction allows.Fundação para a Ciencia e Tecnologia (FCT), Centro de Análise e processamento de Sinais (CAPS

A reduced-CP approach to SC/FDE block transmission for broadband wireless communications

For conventional cyclic prefix (CP)-assisted single-carrier/frequency-domain equalization (SC/FDE) implementations, as well as for orthogonal frequency-division multiplexing (OFDM) implementations, the CP length is known to be selected on the basis of the expected maximum delay spread. Next, the data block size can be chosen to be large enough to minimize the CP overhead, yet small enough to make the channel variation over the block negligible. This paper considers the possibility of reducing the overall CP assistance, when transmitting sequences of SC blocks, while avoiding an excessively long fast Fourier transform window for FDE purposes and keeping good FDE performances through low-complexity, noniterative receiver techniques. These techniques, which take advantage of specially designed frame structures, rely on a basic algorithm for decision-directed correction (DDC) of the FDE inputs when the CP is not long enough to cope with the time-dispersive channel effects. More specifically, we present and evaluate a novel class of reduced-CP SC/FDE schemes, which takes advantage of a special frame structure for replacing "useless" CP redundancy by fully useful channel coding redundancy, with the help of the DDC algorithm. When using the DDC-FDE technique with these especially designed frame structures, the impact of previous decisions, which are not error-free, is shown to be rather small, thereby allowing a power-efficiency advantage (in addition to the obvious bandwidth-efficiency advantage) over conventional block transmission implementations under full-length CP. Additionally, the DDC algorithm is also shown to be useful to improve the power efficiency of these conventional implementations.Fundação para a Ciencia e Tecnologia (FCT), Centro de Análise e processamento de Sinais (CAPS

Conditional Entropy-Constrained Residual VQ with Application to Image Coding

This paper introduces an extension of entropy-constrained residual vector quantization (VQ) where intervector dependencies are exploited. The method, which we call conditional entropy-constrained residual VQ, employs a high-order entropy conditioning strategy that captures local information in the neighboring vectors. When applied to coding images, the proposed method is shown to achieve better rate-distortion performance than that of entropy-constrained residual vector quantization with less computational complexity and lower memory requirements. Moreover, it can be designed to support progressive transmission in a natural way. It is also shown to outperform some of the best predictive and finite-state VQ techniques reported in the literature. This is due partly to the joint optimization between the residual vector quantizer and a high-order conditional entropy coder as well as the efficiency of the multistage residual VQ structure and the dynamic nature of the prediction

Factor graph based detection approach for high-mobility OFDM systems with large FFT modes

In this article, a novel detector design is proposed for orthogonal frequency division multiplexing (OFDM) systems over frequency selective and time varying channels. Namely, we focus on systems with large OFDM symbol lengths where design and complexity constraints have to be taken into account and many of the existing ICI reduction techniques can not be applied. We propose a factor graph (FG) based approach for maximum a posteriori (MAP) symbol detection which exploits the frequency diversity introduced by the ICI in the OFDM symbol. The proposed algorithm provides high diversity orders allowing to outperform the free-ICI performance in high-mobility scenarios with an inherent parallel structure suitable for large OFDM block sizes. The performance of the mentioned near-optimal detection strategy is analyzed over a general bit-interleaved coded modulation (BICM) system applying low-density parity-check (LDPC) codes. The inclusion of pilot symbols is also considered in order to analyze how they assist the detection process

Estimation and detection techniques for doubly-selective channels in wireless communications

A fundamental problem in communications is the estimation of the channel. The signal transmitted through a communications channel undergoes distortions so that it is often received in an unrecognizable form at the receiver. The receiver must expend significant signal processing effort in order to be able to decode the transmit signal from this received signal. This signal processing requires knowledge of how the channel distorts the transmit signal, i.e. channel knowledge. To maintain a reliable link, the channel must be estimated and tracked by the receiver. The estimation of the channel at the receiver often proceeds by transmission of a signal called the 'pilot' which is known a priori to the receiver. The receiver forms its estimate of the transmitted signal based on how this known signal is distorted by the channel, i.e. it estimates the channel from the received signal and the pilot. This design of the pilot is a function of the modulation, the type of training and the channel. [Continues.

Second year technical report on-board processing for future satellite communications systems

Advanced baseband and microwave switching techniques for large domestic communications satellites operating in the 30/20 GHz frequency bands are discussed. The nominal baseband processor throughput is one million packets per second (1.6 Gb/s) from one thousand T1 carrier rate customer premises terminals. A frequency reuse factor of sixteen is assumed by using 16 spot antenna beams with the same 100 MHz bandwidth per beam and a modulation with a one b/s per Hz bandwidth efficiency. Eight of the beams are fixed on major metropolitan areas and eight are scanning beams which periodically cover the remainder of the U.S. under dynamic control. User signals are regenerated (demodulated/remodulated) and message packages are reformatted on board. Frequency division multiple access and time division multiplex are employed on the uplinks and downlinks, respectively, for terminals within the coverage area and dwell interval of a scanning beam. Link establishment and packet routing protocols are defined. Also described is a detailed design of a separate 100 x 100 microwave switch capable of handling nonregenerated signals occupying the remaining 2.4 GHz bandwidth with 60 dB of isolation, at an estimated weight and power consumption of approximately 400 kg and 100 W, respectively

Reducing instruction cache energy using gated wordlines

Thesis (M.Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1999.Includes bibliographical references (p. 87-88).by Mukaya Panich.M.Eng