Dual-Band Transmitter and Receiver with Bowtie-Antenna in 0.13 μm SiGe BiCMOS for Gas Spectroscopy at 222 - 270 GHz

This paper presents a transmitter (TX) and a receiver (RX) with bowtie-antenna and silicon lens for gas spectroscopy at 222-270 GHz, which are fabricated in IHP’s 0.13 μm SiGe BiCMOS technology. The TX and RX use two integrated local oscillators for 222 – 256 GHz and 250 – 270 GHz, which are switched for dual-band operation. Due to its directivity of about 27 dBi, the single integrated bowtie-antenna with silicon lens enables an EIRP of about 25 dBm for the TX, and therefore a considerably higher EIRP for the 2-band TX compared to previously reported systems. The double sideband noise temperature of the RX is 20,000 K (18.5 dB noise figure) as measured by the Y-factor method. Absorption spectroscopy of gaseous methanol is used as a measure for the performance of the gas spectroscopy system with TX- and RX-modules

A GHz-range, High-resolution Multi-modulus Prescaler for Extreme Environment Applications

The generation of a precise, low-noise, reliable clock source is critical to developing mixed-signal and digital electronic systems. The applications of such a clock source are greatly expanded if the clock source can be configured to output different clock frequencies. The phase-locked loop (PLL) is a well-documented architecture for realizing this configurable clock source. Principle to the configurability of a PLL is a multi-modulus divider. The resolution of this divider (or prescaler) dictates the resolution of the configurable PLL output frequency. In integrated PLL designs, such a multi-modulus prescaler is usually sourced from a GHz-range voltage-controlled oscillator. Therefore, a fully-integrated PLL ASIC requires the development of a high-speed, high-resolution multi-modulus prescaler. The design challenges associated with developing such a prescaler are compounded when the application requires the device to operate in an extreme environment. In these extreme environments (often extra-terrestrial), wide temperature ranges and radiation effects can adversely affect the operation of electronic systems. Even more problematic is that extreme temperatures and ionizing radiation can cause permanent damage to electronic devices. Typical commercial-off-the-shelf (COTS) components are not able withstand such an environment, and any electronics operating in these extreme conditions must be designed to accommodate such operation. This dissertation describes the development of a high-speed, high-resolution, multi-modulus prescaler capable of operating in an extreme environment. This prescaler has been developed using current-mode logic (CML) on a 180-nm silicon-germanium (SiGe) BiCMOS process. The prescaler is capable of operating up to at least 5.4 GHz over a division range of 16-48 with a total of 27 configurable moduli. The prescaler is designed to provide excellent ionizing radiation hardness, single-event latch-up (SEL) immunity, and single-event upset (SEU) resistance over a temperature range of −180°C to 125°C

Dual-Band Transmitter and Receiver With Bowtie-Antenna in 0.13 μm SiGe BiCMOS for Gas Spectroscopy at 222 - 270 GHz

This paper presents a transmitter (TX) and a receiver (RX) with bowtie-antenna and silicon lens for gas spectroscopy at 222-270 GHz, which are fabricated in IHP's 0.13 μm SiGe BiCMOS technology. The TX and RX use two integrated local oscillators for 222 - 256 GHz and 250 - 270 GHz, which are switched for dual-band operation. Due to its directivity of about 27 dBi, the single integrated bowtie-antenna with silicon lens enables an EIRP of about 25 dBm for the TX, and therefore a considerably higher EIRP for the 2-band TX compared to previously reported systems. The double sideband noise temperature of the RX is 20,000 K (18.5 dB noise figure) as measured by the Y-factor method. Absorption spectroscopy of gaseous methanol is used as a measure for the performance of the gas spectroscopy system with TX- and RX-modules

Four-element phased-array beamformers and a self-interference canceling full-duplex transciver in 130-nm SiGe for 5G applications at 26 GHz

This thesis is on the design of radio-frequency (RF) integrated front-end circuits for next generation 5G communication systems. The demand for higher data rates and lower latency in 5G networks can only be met using several new technologies including, but not limited to, mm-waves, massive-MIMO, and full-duplex. Use of mm-waves provides more bandwidth that is necessary for high data rates at the cost of increased attenuation in air. Massive-MIMO arrays are required to compensate for this increased path loss by providing beam steering and array gain. Furthermore, full duplex operation is desirable for improved spectrum efficiency and reduced latency. The difficulty of full duplex operation is the self-interference (SI) between transmit (TX) and receive (RX) paths. Conventional methods to suppress this interference utilize either bulky circulators, isolators, couplers or two separate antennas. These methods are not suitable for fully-integrated full-duplex massive-MIMO arrays. This thesis presents circuit and system level solutions to the issues summarized above, in the form of SiGe integrated circuits for 5G applications at 26 GHz. First, a full-duplex RF front-end architecture is proposed that is scalable to massive-MIMO arrays. It is based on blind, RF self-interference cancellation that is applicable to single/shared antenna front-ends. A high resolution RF vector modulator is developed, which is the key building block that empowers the full-duplex frontend architecture by achieving better than state-of-the-art 10-b monotonic phase control. This vector modulator is combined with linear-in-dB variable gain amplifiers and attenuators to realize a precision self-interference cancellation circuitry. Further, adaptive control of this SI canceler is made possible by including an on-chip low-power IQ downconverter. It correlates copies of transmitted and received signals and provides baseband/dc outputs that can be used to adaptively control the SI canceler. The solution comes at the cost of minimal additional circuitry, yet significantly eases linearity requirements of critical receiver blocks at RF/IF such as mixers and ADCs. Second, to complement the proposed full-duplex front-end architecture and to provide a more complete solution, high-performance beamformer ICs with 5-/6- b phase and 3-/4-b amplitude control capabilities are designed. Single-channel, separate transmitter and receiver beamformers are implemented targeting massive- MIMO mode of operation, and their four-channel versions are developed for phasedarray communication systems. Better than state-of-the-art noise performance is obtained in the RX beamformer channel, with a full-channel noise figure of 3.3 d

Analysis and design of an 80 Gbit/sec clock and data recovery prototype

La demande croissante de toujours plus de débit pour les télécommunications entraine une augmentation de la fréquence de fonctionnement des liaisons séries. Cette demande se retrouve aussi dans les systèmes embarqués du fait de l'augmentation des performances des composants et périphériques. Afin de s'assurer que le train de données est bien réceptionné, un circuit de restitution d'horloge et de données est placé avant tout traitement du coté du récepteur. Dans ce contexte, les activités de recherche présentées dans cette thèse se concentrent sur la conception d'une CDR (Clock and Data Recovery). Nous détaillerons le comparateur de phase qui joue un rôle critique dans un tel système. Cette thèse présente un comparateur de phase ayant comme avantage d'avoir une mode de fenêtrage et une fréquence de fonctionnement réduite. La topologie spéciale utilisée pour la CDR est décrite, et la théorie relative aux oscillateurs verrouillés en injection est expliquée. L'essentiel du travail de recherche s'est concentrée sur la conception et le layout d'une restitution d'horloge dans le domaine millimétrique, à 80 Gbps. Pour cela plusieurs prototypes ont été réalisés en technologie BiCMOS 130 nm de STMicrolectronics.The increasing bandwidth demand for telecommunication leads to an important rise of serial link operating frequencies. This demand is also present in embedded systems with the growth of devices and peripherals performances. To ensure the data stream is well recovered, a clock and data recovery (CDR) circuit is placed before any logical blocks on the receiver side. The research activities presented in this thesis are related to the design of such a CDR. The phase detector plays a critical role in the CDR circuit and is specially studied. This thesis presents a phase comparator that provides an enhancement by introducing a windowed mode and reducing its operating frequency. The used CDR has a special topology, which is described, and the injection locked oscillator theory is explained. Most of the research of this study has focused on the design and layout of a 80 Gbps CDR. Several prototypes are realized in 130 nm SiGe process from STMicroelectronics.BORDEAUX1-Bib.electronique (335229901) / SudocSudocFranceF

Design and realization of fully integrated multiband and multistandard bi-cmos sigma delta frequency synthesizer

Wireless communication has grown, exponentially, with wide range of applications offered for the customers. Among these, WLAN (2.4-2.5GHz, 3.6-3.7GHzand 4.915- 5.825GHz GHz), Bluetooth (2.4 GHz), and WiMAX (2.500-2.696 GHz, 3.4-3.8 GHz and 5.725-5.850 GHz) communication standard/technologies have found largest use local area, indoor – outdoor communication and entertainment system applications. One of the recent trends in this area of technology is to utilize compatible standards on a single chip solutions, while meeting the requirements of each, to provide customers systems with smaller size, lower power consumption and cheaper in cost. In this thesis, RF – Analog, and – Digital Integrated Circuit design methodologies and techniques are applied to realize a multiband / standart (WLAN and WiMAX) operation capable Voltage- Controlled-Oscillator (VCO) and Frequency Synthesizer. Two of the major building blocks of wireless communication systems are designed using 0.35 μm, AMS-Bipolar (HBT)-CMOS process technology. A new inductor switching concept is implemented for providing the multiband operation capability. Performance parameters such as operating frequencies, phase noise, power consumption, and tuning range are modeled and simulated using analytical approaches, ADS® and Cadence® design and simulation environments. Measurement and/or Figure-of-Merit (FOM) values of our circuits have revealed results that are comparable with already published data, using the similar technology, in the literature, indicating the strength of the design methodologies implemented in this study

Realization of a voltage controlled oscillator using 0.35 um sige-bicmos technology for multi-band applications

The stable growth in wireless communications market has engendered the interoperability of various standards in a single broadband frequency range from hundred MHz up to several GHz. This frequency range consists of various wireless applications such as GSM, Bluetooth and WLAN. Therefore, an agile wireless system needs smart RF front-ends for functioning properly in such a crowded spectrum. As a result, the demand for multi-standard RF transceivers which put various wireless and cordless phone standards together in one structure was increased. The demand for multi-standard RF transceivers gives a key role to reconfigurable wideband VCO operation with low-power and low-phase noise characteristics. Besides agility and intelligence, such a communication system (GSM, WLAN, Global Positioning Systems, etc. ) required meeting the requirements of several standards in a cost-effective way. This, when cost and integration are the major concerns, leads to the exploitation of Si-based technologies. In this thesis, an integrated 2.2-5.7GHz Multi-band differential LC VCO for Multi-standard Wireless Communication systems was designed utilizing 0.35μm SiGe BiCMOS technology. The topology, which combines the switching inductors and capacitors together in the same circuit, is a novel approach for wideband VCOs. Based on the post layout simulation results, the VCO can be tuned using a DC voltage of 0 to 3.3V for 5 different frequency bands (2.27-2.51 GHz, 2.48-2.78GHz, 3.22-3.53GHz, 3.48-3.91GHz and 4.528-5.7GHz) with a maximum bandwidth of 1.36GHz and a minimum bandwidth of 300MHz. The designed and simulated VCO can generate a differential output power between 0.992 dBm and -6.087 dBm with an average power consumption of 44.21mW including the buffers. The average second and third harmonics level were obtained as -37.21 dBm and -47.6 dBm, respectively. The phase noise between -110.45 and -122.5 dBc/Hz, that was simulated at 1 MHz offset, can be obtained through the frequency of interest. Additionally, the figure of merit (FOM), that includes all important parameters such as the phase noise, the power consumption and the ratio of the operating frequency to the offset frequency, is between -176.48 and -181.16 and comparable or better than the ones with the other current VCOs. The main advantage of this study in comparison with the other VCOs, is covering 5 frequency bands starting from 2.27 up to 5.76 GHz without FOM and area abandonment

RF-MEMS Switch Module in a 0.25 µm SiGe:C BiCMOS Process

Drahtlose Kommunikationstechnologien im Frequenzbereich bis 6 GHz wurden in der Vergangenheit in Bezug auf Leistungsfaehigkeit und Frequenzbereich kontinuierlich verbessert. Aufgrund der Skalierung nach dem Mooreschen Gesetz koennen heutzutage mm-Wellen Schaltkreise in CMOS-Technologien hergestellt werden. Durch die Einfuehrung von SiGe zur Realisierung einer leistungsfaehigen BiCMOS-Technologie wurde ebenfalls eine Verbesserung der Frequenzeigenschaften und Ausgangsleistungen erreicht, wodurch aktive CMOS- oder BiCMOS-Bauelemente vergleichbare Leistungsparameter zu III-V Technologien bei geringeren Kosten bereitstellen koennen. Bedingt durch das niederohmige Silizium-Substrat der BiCMOS-Technologie weisen vor allem passive Komponenten hoehere Verluste auf und weder III-V- noch BiCMOS-Technologien bieten hochlineare Schaltkomponenten mit geringen Verlusten und geringen Leistungsaufnahmen im mm-Wellen Bereich. RF-MEMS Schalter sind bekannt fuer ihre ausgezeichneten HF-Eigenschaften. Die Leistungsaufnahme von elektrostatisch angetriebenen RF-MEMS Schaltern ist vernachlaessigbar und es koennen im Vergleich zu halbleiter-basierten Schaltern hoehere Leistungen verarbeitet werden. Nichtsdestotrotz wurden RF-MEMS Schalter hauptsaechlich als eigenstaendige Komponenten entwickelt. Zur Systemintegration wird meist ein System-in-Package (SiP) Ansatz angewandt, der fuer niedrige Frequenzen geeignet ist, aber bei mm-Wellenanwendungen durch parasitaere Verluste an seine Grenzen stoesst. In dieser Arbeit wird ein in eine BiCMOS-Technologie integrierter RF-MEMS Schalter fuer mm-Wellen Anwendungen gezeigt. Das Design, die Integration und die experimentellen Ergebnisse sowie verschiedene Packaging-Konzepte werden beschrieben Zur Bereitstellung der hohen Auslenkungs-Spannungen wurde eine Ladungspumpe auf dem Chip integriert. Zum Schluss werden verschiedene, rekonfigurierbare mm-Wellen Schaltkreise zur Demonstration der Leistungsfaehigkeit des Schalters gezeigt.Wireless communication technologies have continuously advanced for both performance and frequency aspects, mainly for the frequencies up to 6 GHz. The results of Moore’s law now also give the opportunity to design mm-wave circuits using advanced CMOS technologies. The introduction of SiGe into CMOS, providing high performance BiCMOS, has also enhanced both the frequency and the power performance figures. The current situation is that the active devices of both CMOS and BiCMOS technologies can provide performance figures competitive with III-V technologies while having still the advantage of low cost. However, similar competition cannot be pronounced for the passive components considering the low-resistive substrates of BiCMOS technologies. Moreover, both III-V and BiCMOS technologies have the lack of low-loss and low-power consumption, as well as highly linear switching and tuning components at mm-wave frequencies. RF-MEMS switch technologies have been well-known with excellent RF- performance figures. The power consumption of electrostatic RF-MEMS switches is negligible and they can handle higher power levels compared to their semiconductor counterparts. However, RF-MEMS switches have been mostly demonstrated as standalone processes and have started to be used as commercial off-the-shelf (COTS) devices recently. The full system integration is typically done by a System-in-Package (SiP) approach. Although SiP is suitable for lower frequencies, the packaging parasitics limit the use of this approach for the mm-wave frequencies. In this thesis, a fully BiCMOS embedded RF-MEMS switch for mm-wave applications is proposed. The design, the implementation and the experimental results of the switch are provided. The developed RF-MEMS switch is packaged using different packaging approaches. To actuate the RF-MEMS switch, an on-chip high voltage generation circuit is designed and characterized. The robustness and the reliability performance of the switch are also presented. Finally, the developed RF-MEMS switch is successfully demonstrated in re-configurable mm-wave circuits