Active C4 electrodes for local field potential recording applications

Extracellular neural recording, with multi-electrode arrays (MEAs), is a powerful method used to study neural function at the network level. However, in a high density array, it can be costly and time consuming to integrate the active circuit with the expensive electrodes. In this paper, we present a 4 mm × 4 mm neural recording integrated circuit (IC) chip, utilizing IBM C4 bumps as recording electrodes, which enable a seamless active chip and electrode integration. The IC chip was designed and fabricated in a 0.13 μm BiCMOS process for both in vitro and in vivo applications. It has an input-referred noise of 4.6 μV rms for the bandwidth of 10 Hz to 10 kHz and a power dissipation of 11.25 mW at 2.5 V, or 43.9 μW per input channel. This prototype is scalable for implementing larger number and higher density electrode arrays. To validate the functionality of the chip, electrical testing results and acute in vivo recordings from a rat barrel cortex are presented.R01 NS072385 - NINDS NIH HHS; 1R01 NS072385 - NINDS NIH HH

Ultra-Miniaturised CMOS Current Driver for Wireless Biphasic Intracortical Microstimulation

This work shows an ultra-miniaturised and ultralow-power CMOS current driver for biphasic intracortical microstimulation. The CMOS driver is composed of a leakage-based voltage-to-current converter and an H-bridge circuit providing biphasic charge-balanced current stimulation. The circuit has been simulated, fabricated and tested. The current driver consumes 1.87 µW with a supply voltage of 1.8 V, and it occupies a silicon area of 15×12.4 µm 2 . The driver works in linearity in the current range between 23−92 µ

A power efficient time-to-current stimulator for vagal-cardiac connection after heart transplantation

This paper presents a stimulator for a cardiac neuroprosthesis aiming to restore the parasympathetic control after heart transplantation. The stimulator is based on time-to-current conversion, instead of the conventional current mode digital-to-analog converter (DAC) that drives the output current mirrors. It uses a DAC based on capacitor charging to drive a power efficient voltage-to-current converter for output. The stimulator uses 1.8 V for system operation and 10 V for stimulation. The total power consumption is Istim × 10 V +18. u μW during the biphasic current output, with a maximum Istim of 512 μA. The stimulator was designed in CMOS 0.18 μm technology and post-layout simulations are presented

A Multi-Channel Stimulator With High-Resolution Time-to-Current Conversion for Vagal-Cardiac Neuromodulation

This paper presents an integrated stimulator for a cardiac neuroprosthesis aiming to restore the parasympathetic control after heart transplantation. The stimulator is based on time-to-current conversion. Instead of the conventional current mode digital-to-analog converter (DAC) that uses ten of microamp for biasing, the proposed design uses a novel capacitor time-based DAC offering close to 10 bit of current amplitude resolution while using only a bias current 250 nA. The stimulator chip was design in a 0.18 m CMOS high-voltage (HV) technology. It consists of 16 independent channels, each capable of delivering 550 A stimulus current under a HV output stage that can be operated up to 30 V. Featuring both power efficiency and high-resolution current amplitude stimulation, the design is suitable for multi-channel neural simulation applications

Advances in Scalable Implantable Systems for Neurostimulation Using Networked ASICs

Neurostimulation is a known method for restoring lost functions to neurologically impaired patients. This paper describes recent advances in scalable implantable stimulation systems using networked application specific integrated circuits (ASICs). It discusses how they can meet the ever-growing demand for high-density neural interfacing and long-term reliability. A detailed design example of an implantable (inductively linked) scalable stimulation system for restoring lower limb functions in paraplegics after spinal cord injury is presented. It comprises a central hub implanted at the costal margin and multiple Active Books which provide the interface for stimulating nerve roots in the cauda equina. A 16-channel stimulation system using four Active Books is demonstrated. Each Active Book has an embedded ASIC, which is responsible for initiating stimulus current to the electrodes. It also ensures device safety by monitoring temperature, humidity, and peak electrode voltage during stimulation. The implant hub was implemented using a microcontroller-based circuit. The ASIC in the Active Book was fabricated using XFAB’s 0.6-µm high-voltage CMOS process. The stimulation system does not require an accurate reference clock in the implant. Measured results are provided

APPROXIMATE COMPUTING BASED PROCESSING OF MEA SIGNALS ON FPGA

The Microelectrode Array (MEA) is a collection of parallel electrodes that may measure the extracellular potential of nearby neurons. It is a crucial tool in neuroscience for researching the structure, operation, and behavior of neural networks. Using sophisticated signal processing techniques and architectural templates, the task of processing and evaluating the data streams obtained from MEAs is a computationally demanding one that needs time and parallel processing.This thesis proposes enhancing the capability of MEA signal processing systems by using approximate computing-based algorithms. These algorithms can be implemented in systems that process parallel MEA channels using the Field Programmable Gate Arrays (FPGAs). In order to develop approximate signal processing algorithms, three different types of approximate adders are investigated in various configurations. The objective is to maximize performance improvements in terms of area, power consumption, and latency associated with real-time processing while accepting lower output accuracy within certain bounds. On FPGAs, the methods are utilized to construct approximate processing systems, which are then contrasted with the precise system. Real biological signals are used to evaluate both precise and approximative systems, and the findings reveal notable improvements, especially in terms of speed and area. Processing speed enhancements reach up to 37.6%, and area enhancements reach 14.3% in some approximate system modes without sacrificing accuracy. Additional cases demonstrate how accuracy, area, and processing speed may be traded off. Using approximate computing algorithms allows for the design of real-time MEA processing systems with higher speeds and more parallel channels. The application of approximate computing algorithms to process biological signals on FPGAs in this thesis is a novel idea that has not been explored before

Recent Progress of Development of Optogenetic Implantable Neural Probes

As a cell type-specific neuromodulation method, optogenetic technique holds remarkable potential for the realisation of advanced neuroprostheses. By genetically expressing light-sensitive proteins such as channelrhodopsin-2 (ChR2) in cell membranes, targeted neurons could be controlled by light. This new neuromodulation technique could then be applied into extensive brain networks and be utilised to provide effective therapies for neurological disorders. However, the development of novel optogenetic implants is still a key challenge in the field. The major requirements include small device dimensions, suitable spatial resolution, high safety, and strong controllability. In this paper, I present a concise review of the significant progress that has been made towards achieving a miniaturised, multifunctional, intelligent optogenetic implant. I identify the key limitations of current technologies and discuss the possible opportunities for future development

New Techniques for Multi-Channel Biosignal Acquisition and Low-Power, Low-Resistance-Measurement Systems

Dense electrical recording of biosignals has been developed to provide spatial resolution and precise temporal information for health monitoring, diagnostics, and clinical research. However, more electrodes require more wires, and wiring density quickly becomes a limiting factor. To break this bottleneck, we proposed a frequency-division multiplexing (FDM) based architecture for multi-channel acquisition systems. In this final exam, I present two applications that make use of this FDM technique. The first is an FDM-based multi-channel electromyography (EMG) acquisition system, which demonstrates that the FDM system not only reduces wire count, but also mitigates the effect of low frequency motion artifacts and 50/60 Hz mains interference introduced in the wire. An FDM-based four-channel EMG recording is demonstrated, while carrying all channels over a 3-wire interface, and the system achieves an attenuation of low-frequency cable motion artifacts by 15X an! d 60Hz mains noise coupled in the cable by 62X. A second application that forms the basis of my current research effort is an FDM-based neural recording system with multiple graphene active electrodes. We demonstrated a two-channel system including graphene FET electrodes, a custom integrated circuit (IC) analog front-end (AFE), and digital demodulation. In related multi-channel sensor work, a growing need for ultra-low-power sensors has driven continuous advancement in read-out circuits for temperature, humidity, and pressure. IC-integrated Wheatstone bridges, commonly used, are efficient for large sensor resistance (5k-500kohm), but measuring small resistance (30,000x smaller nominal sensor resistance

Integrated circuit design for implantable neural interfaces

Progress in microfabrication technology has opened the way for new possibilities in neuroscience and medicine. Chronic, biocompatible brain implants with recording and stimulation capabilities provided by embedded electronics have been successfully demonstrated. However, more ambitious applications call for improvements in every aspect of existing implementations. This thesis proposes two prototypes that advance the field in significant ways. The first prototype is a neural recording front-end with spectral selectivity capabilities that implements a design strategy that leads to the lowest reported power consumption as compared to the state of the art. The second one is a bidirectional front-end for closed-loop neuromodulation that accounts for self-interference and impedance mismatch thus enabling simultaneous recording and stimulation. The design process and experimental verification of both prototypes is presented herein