Error-correction coding

This report describes the progress made towards the completion of a specific task on error-correcting coding. The proposed research consisted of investigating the use of modulation block codes as the inner code of a concatenated coding system in order to improve the overall space link communications performance. The study proposed to identify and analyze candidate codes that will complement the performance of the overall coding system which uses the interleaved RS (255,223) code as the outer code

Studies in Error Correction Coding

For a proper understanding of the implementation of error correction coding schemes, a basic knowledge of communication channels and networks is necessary. Communication channels incur several types of errors, including noise and signal attenuation. Consequently, the benefits of a particular error control scheme are determined by the errors which occur most frequently. First, the types of transmissions across which errors occur will be considered. Subsequently, the types of errors that can appear during these transmissions and a short discussion of the cause of errors are necessary to understand the several types of errors that can occur. Afterward, the implementation of several major coding schemes will be discussed, including block codes, linear codes, and convolutional codes. Convolutional codes will specifically be discussed in terms of turbo codes and low-density parity check codes. Lastly, research of error correction coding schemes will involve several kinds of resources, including textbooks, journal articles, and technical publications. These resources will be used for the understanding of a practical implementation of an error correction coding scheme

Perfect quantum error correction coding in 24 laser pulses

An efficient coding circuit is given for the perfect quantum error correction of a single qubit against arbitrary 1-qubit errors within a 5 qubit code. The circuit presented employs a double `classical' code, i.e., one for bit flips and one for phase shifts. An implementation of this coding circuit on an ion-trap quantum computer is described that requires 26 laser pulses. A further circuit is presented requiring only 24 laser pulses, making it an efficient protection scheme against arbitrary 1-qubit errors. In addition, the performance of two error correction schemes, one based on the quantum Zeno effect and the other using standard methods, is compared. The quantum Zeno error correction scheme is found to fail completely for a model of noise based on phase-diffusion.Comment: Replacement paper: Lost two laser pulses gained one author; added appendix with circuits easily implementable on an ion-trap compute

VLSI Implementation of Block Error Correction Coding Techniques

Communication Engineering has become the most vital field of Engineering in today’s life. The world is dreaded to think beyond any communication gadgets. Data communication basically involves transfers of data from one place to another or from one point of time to another. Error may be introduced by the channel which makes data unreliable for user. Hence we need different error detection and error correction schemes. In the present work, we perform the comparative study between different FECs like Turbo codes, Reed-Solomon codes and LPDC codes. But among all these we find Reed Solomon to be most efficient for data communication because of low coding complexity and high coding rate. The RS codes are non-binary, linear and cyclic codes used for burst error correction. They are used in numerous applications like CDs, DVDs and deep space communication. We simulate RS Encoder and RS Decoder for double error correcting RS (7, 3) code. Then we implement RS (255,239) code in VHDL. In RS (255,239) code, each data symbol consists of 8 bits which is quite practical as most of the data transfer is done in terms of bytes. The implementation has been done in the most efficient algorithms to optimize the design in terms of space utilization and latency of the code. The behavioral simulation has been carried out for each block and for the whole design also. Finally, the FPGA utilization and clock cycles needed are analyzed and compared with the already developed designs

Tutorial on Reed-Solomon error correction coding

This tutorial attempts to provide a frank, step-by-step approach to Reed-Solomon (RS) error correction coding. RS encoding and RS decoding both with and without erasing code symbols are emphasized. There is no need to present rigorous proofs and extreme mathematical detail. Rather, the simple concepts of groups and fields, specifically Galois fields, are presented with a minimum of complexity. Before RS codes are presented, other block codes are presented as a technical introduction into coding. A primitive (15, 9) RS coding example is then completely developed from start to finish, demonstrating the encoding and decoding calculations and a derivation of the famous error-locator polynomial. The objective is to present practical information about Reed-Solomon coding in a manner such that it can be easily understood