Efficient optimization of the integrity behavior of analog nonlinear devices using surrogate models

A novel technique to analyze and optimize the integrity behavior of nonlinear analog devices in the presence of noise is proposed. The technique leverages surrogate models, as such reducing the simulation time, avoiding time-consuming and expensive measurements after tape-out and hiding the original netlist of the circuit, while maintaining high accuracy. Easy integration of the surrogates into a circuit simulator together with pertinent subcircuits representing, e. g., board and package, allows mimicking the integrity behavior of a complete setup while still being in the design phase. In this contribution, the method is applied to a case study, being a voltage regulator designed for automotive applications

Translation of automotive module RF immunity test limits into equivalent IC test limits using S-parameter IC models

A method to translate immunity specifications of automotive modules into equivalent requirements at integrated circuit (IC) level, using linear scattering parameter models of the ICs, is presented. A technique is described to determine S-parameters of ICs by simulations based on back-annotated analog schematics. The simulation results are compared with measurement data obtained using a specially designed test board. As an example, simulation and measurement results are given for the input stage of an automotive sensor interface. A good agreement is obtained from the lowest test frequency up to 1 GHz. Above this value, the measured results seem to be dominated by package effects

Case Study on the Differences between EMI Resilience of Analog ICs against Continuous Wave, Modulated and Transient Disturbances

© 2015 IEEE. Transient disturbance signals are getting more and more attention lately (e.g. in the automotive industry). Electromagnetic compatibility (EMC) at IC level so far focused on continuous wave (CW) disturbances and how to deal with them, but transient phenomena were not thoroughly studied yet. In this exploratory paper, we perform a case study (based on a basic current mirror) in order to reveal the effects of transient disturbances (as compared to CW ones) and to determine what IC design techniques could be used to deal with them.status: publishe