Learning from the Canadian Corps on the Western Front

There is a curious paradox about the Canadian Corps that is summed up in this quotation from Canadian Brass, Stephen J. Harris’s study of the evolution of a professional army in Canada. How did this military organisation become so effective in war, considering the background it had and the structure that supported it for most of its existence? This model of tactical excellence was born amid the chaos of Canadian Minister of Defence Sam Hughes’ egomaniacal control at Valcartier Camp. It was beset by jealousies, political backhanders, corruption and influence peddling, and saddled with favourites as incompetent officers who at best were ’very weak” and had “no power or habit of command.”2 Hughes determined to ensure that no Regular soldier received a command appointment, and instead put in his favourites. These were drawn from the citizen militia, whose ability was summed up by the young iconoclast and future military theorist J.F.C. Fuller, who remarked that the Canadians had potential only “if the officers could all be shot.”3 Yet the Canadian Expeditionary Force (CEF) rose above this administrative nightmare, even if its impact continued to haunt the force for most of its existence

The mistake of 1937: a general equilibrium anlaysis

This paper studies a dynamic general equilibrium model with sticky prices and rational expectations in an environment of low interest rates and deflationary pressures. We show that small changes in the public’s beliefs about the future inflation target of the government can lead to large swings in both inflation and output. This effect is much larger at low interest rates than under regular circumstances. This highlights the importance of effective communication policy at zero interest rates. We argue that confusing communications by the US Federal Reserve, the President of the United States, and key administration officials about future price objectives were responsible for the sharp recession in the US in 1937-38, one of the sharpest recessions in US economic history. Poor communication policy is the mistake of 1937. Before committing the mistake of 1937 the US policy makers faced economic conditions that are similar in some respect to those confronted by Japanese policy makers in the first half of 2006. JEL Classification: E32, E52, E6

The Mistake of 1937: A General Equilibrium Analysis

This paper studies a dynamic stochastic general equilibrium model with sticky prices and rational expectations in an environment of low interest rates and deflationary pressures. We show that small changes in the publicfs beliefs about the future inflation target of the government can lead to large swings in both inflation and output. This effect is much larger at low interest rates than under regular circumstances. This highlights the importance of effective communication policy at zero interest rates. We argue that confusing communications by the U.S. Federal Reserve, the President of the United States, and key administration officials about future price objectives were responsible for the sharp recession in the United States in 1937?38, one of the sharpest recessions in U.S. economic history. Poor communication policy is the mistake of 1937. Before committing the mistake of 1937, the U.S. policymakers faced economic conditions that are similar in some respects to those confronted by Japanese policymakers in the first half of 2006.Deflation; Zero bound on interest rates; Regime changes; Great Depression

User microprogrammable processors for high data rate telemetry preprocessing

The use of microprogrammable processors for the preprocessing of high data rate satellite telemetry is investigated. The following topics are discussed along with supporting studies: (1) evaluation of commercial microprogrammable minicomputers for telemetry preprocessing tasks; (2) microinstruction sets for telemetry preprocessing; and (3) the use of multiple minicomputers to achieve high data processing. The simulation of small microprogrammed processors is discussed along with examples of microprogrammed processors

Silks and Serjeants on the Western Circuit, 1814-1900

Unpublished pape

High Sheriffs of Devon since 1832

In 1898 the Public Record Office published a list of the High Sheriffs of Devon until 1832. The following list has been compiled from the London Gazette

Analysis of design strategies for RF ESD problems in CMOS circuits

This thesis analyses the design strategies used to protect RF circuits that are implemented in CMOS technologies. It investigates, in detail, the physical mechanisms involved when a ggNMOS structure is exposed to an ESD event and undergoes snapback. The understanding gained is used to understand why the performance of the current RF ESD clamp is poor and suggestions are made as to how the performance of ggNMOS clamps can be improved beyond the current body of knowledge. The ultimate aim is to be able to design effective ESD protection clamps whilst minimising the effect the circuit has on RF I/O signals. A current ggNMOS based RF ESD I/O protection circuit is analysed in detail using a Transmission Line Pulse (TLP) tester. This is shown to be a very effective diagnostic tool by showing many characteristics of the ggNMOS during the triggering and conducting phase of the ESD event and demonstrate deficiencies in the clamp design. The use of a FIB enhances the analysis by allowing the isolation of individual components in the circuit and therefore their analysis using the TLP tester. SPICE simulations are used to provide further commentary on the debate surrounding the specification required of a TLP tester for there to be a good correlation between a TLP test and the industry standard Human Body Model (HBM) ESD test. Finite element simulations are used to probe deeper in to the mechanisms involved when a ggNMOS undergoes snapback especially with regard to the contribution parasitic components within the ggNMOS make to the snapback process. New ggNMOS clamps are proposed which after some modification are shown to work. Some of the finite element experiments are repeated in a 0.18μπ7. process CMOS test chip and a comparison is made between the two sets of results. In the concluding chapter understanding that has been gained from previous chapters is combined with the published body of knowledge to suggest and explain improvements in the design of a ggNMOS for RF and standard applications. These improvements will improve homogeneity of ggNMOS operation thus allowing the device size to be reduced and parasitic loading for a given ESD performance. These techniques can also be used to ensure that the ESD current does not take an unintended path through the chip