De-Embedding for Coupled Three-Port Devices

In many applications, the device under test (DUT) is embedded into a test setup. Various de-embedding techniques have been proposed to expose the real electrical behaviors of a DUT, e.g., the traditional thru-reflect-line and short-open-load-thru algorithms, where the T-matrix and its inverse form are adopted in the mathematical process. In the fields of radiofrequency and electromagnetic compatibility, a DUT may have three coupled ports, and the symmetry in the associated S-matrix breaks down, because the numbers of entry and exist ports are not equal, which results in a non-square T-matrix based upon the definitions. Given that the inverse expression of a non-square matrix does not exist, the conventional de-embedding methods are not applicable for a coupled three-port network. In this paper, a de-embedding algorithm which is feasible for coupled three-port devices is proposed and verified through the measurement-based studies. The de-embedding technique may also be applied on devices with more than three ports

A Comparative Study of Image Restoration Networks for General Backbone Network Design

Despite the significant progress made by deep models in various image restoration tasks, existing image restoration networks still face challenges in terms of task generality. An intuitive manifestation is that networks which excel in certain tasks often fail to deliver satisfactory results in others. To illustrate this point, we select five representative image restoration networks and conduct a comparative study on five classic image restoration tasks. First, we provide a detailed explanation of the characteristics of different image restoration tasks and backbone networks. Following this, we present the benchmark results and analyze the reasons behind the performance disparity of different models across various tasks. Drawing from this comparative study, we propose that a general image restoration backbone network needs to meet the functional requirements of diverse tasks. Based on this principle, we design a new general image restoration backbone network, X-Restormer. Extensive experiments demonstrate that X-Restormer possesses good task generality and achieves state-of-the-art performance across a variety of tasks

The Simulated TDR Impedance in PCB Material Characterization

High-speed PCB design for signal integrity (SI) is about feasible material selection, trace geometry determination and optimization of discontinuities, where the accurate PCB material characterization is essential since incorrect material properties may lead to misleading results and wrong design descisions. The previous studies have revealed that the simulated time-domain reflectometry (TDR) impedance in material characterization, which is based upon the transmission-line-based methods, is erroneous when compared to the measured value, although a good agreement between simulation and measurement in the frequency domain can always be reached. In addition, it is also shown that achieving a satisfactory correlation in both transmission phase and trace impedance is a challenge for SI engineers. This implies that the transmission-line-based approaches, which are widely used in industries, are not perfect and that the extracted PCB material properties are not accurate enough. In this paper, a step-by-step investigation is performed and demonstrated to disclose the root causes of the TDR impedance discrepancy. It is found that the disagreement in TDR impedance is contributed by multiple factors which need to be taken into consideration during material characterization. The improved simulation result exhibits excellent consistency with the measured trace impedance. The suggestions to hardware designers on how more accurate PCB dielectric properties can be obtained are given by addressing the TDR impedance discrepancy issue

Far-End Crosstalk Control Strategy for High-Volume High-Speed PCB Manufacturing: The Concept of Critical Resin Content Percent

Far-end crosstalk (FEXT) can reduce the eye opening and eventually decrease the maximum data rate that can be transmitted through the high-speed interconnections. Therefore, FEXT is an important concern in high-speed digital design. The contributors of stripline FEXT include the dielectric inhomogeneity and the proximity effect. In addition, a characterization technique for the effective relative dielectric constant (Dk) of both core and prepreg has been proposed recently for the analysis of the inhomogeneous medium and induced FEXT. In our study, the FEXT levels of the striplines on various printed circuit boards (PCBs) are measured and compared. It is brought to our attention that for some PCB striplines sharing the same stack-up, same PCB material, and manufactured by the same vendor, the corresponding measured FEXT magnitudes of these coupled single-ended traces could vary drastically, which may bring great challenges to the hardware engineers about FEXT level control during the high-volume PCB production phase. In this paper, the root cause of this issue is investigated and analyzed. The \u27critical resin content percent\u27 concept is proposed to explain the variations in the Dk values of prepreg that result in the FEXT level variance. The full wave simulations are conducted to identify the \u27critical glass weave\u27. A measurement-based statistical analysis is performed to verify the \u27critical resin content percent\u27 concept. A design guideline for FEXT control strategy in the high-volume PCB manufacturing is presented based upon this investigation