Copernicus high-resolution layers for land cover classification in Italy

The high-resolution layers (HRLs) are land cover maps produced for the entire Italian territory (approximately 30 million hectares) in 2012 by the European Environment Agency, aimed at monitoring soil imperviousness and natural cover, such as forest, grassland, wetland, and water surface, with a high spatial resolution of 20 m. This study presents the methodologies developed for the production, verification, and enhancement of the HRLs in Italy. The innovative approach is mainly based on (a) the use of available reference data for the enhancement process, (b) the reduction of the manual work of operators by using a semi-automatic approach, and (c) the overall increase in the cost-efficiency in relation to the production and updating of land cover maps. The results show the reliability of these methodologies in assessing and enhancing the quality of the HRLs. Finally, an integration of the individual layers, represented by the HRLs, was performed in order to produce a National High-Resolution Land Cover ma

CV32RT: Enabling Fast Interrupt and Context Switching for RISC-V Microcontrollers

Processors using the open RISC-V ISA are finding increasing adoption in the embedded world. Many embedded use cases have real-time constraints and require flexible, predictable, and fast reactive handling of incoming events. However, RISC- V processors are still lagging in this area compared to more mature proprietary architectures, such as ARM Cortex-M and TriCore, which have been tuned for years. The default interrupt controller standardized by RISC-V, the Core Local Interruptor (CLINT), lacks configurability in prioritization and preemption of interrupts. The RISC-V Core Local Interrupt Controller (CLIC) specification addresses this concern by enabling pre-emptible, low-latency vectored interrupts while also envisioning optional extensions to improve interrupt latency. In this work, we implement a CLIC for the CV32E40P, an industrially supported open-source 32-bit MCU-class RISC-V core, and enhance it with fastirq: a custom extension that provides interrupt latency as low as 6 cycles. We call CV32RT our enhanced core. To the best of our knowledge, CV32RT is the first fully open-source RV32 core with competitive interrupt-handling features compared to the Arm Cortex-M series and TriCore. The proposed extensions are also demonstrated to improve task context switching in real-time operating systems.Comment: 12 pages, submitted to IEEE Transactions on VLSI Systems (TVLSI

To Know or Not To Know: Strategic Inattention and Endogenous Market Structure

We model an industry in which a discrete number of firms choose the output of their differentiated products deciding whether or not to consider the impact of their decisions on aggregate output. We show that two threshold numbers of firms exist such that: below the lower one there is a unique equilibrium in which all firms consider their aggregate impact as in standard oligopoly; above the higher threshold there is a unique equilibrium in which all firms disregard that impact as in standard monopolistic competition; between the two thresholds there are two equilibria, one in which all firms consider their aggregate impact and the other in which they do not. We then show that our model of strategic inattention is isomorphic to a model of strategic delegation with managerial compensation based on relative profit performance

Dream jobs

Understanding why certain jobs are ‘better’ than others and what implications they have for a worker’s career is clearly an important but still relatively unexplored question. We provide both a theoretical framework and a number of empirical results that help distinguishing ‘good’ from ‘bad’ jobs in terms of their impact on a worker’s lifetime wage income profile through wage jumps occurring upon changing job (‘static effects’) or through increases in the wage growth rate (‘dynamic effects’). We find that the distinction between internationally active firms and domestic firms is a meaningful empirical dividing line between employers providing ‘good’ and ‘bad’ jobs. First, in internationally active firms the experience-wage profile is much steeper than in domestic firms, especially for managers as opposed to blue-collar workers. Second, the higher lifetime wage income for managers in internationally active firms relies on the stronger accumulation of experience that these firms allow for and on the (almost) perfect portability of the accumulated dynamic wage gains to other firms. Static effects are instead much more important for blue-collar workers. Finally, the distinction between internationally active and domestic firms is relevant also at a more aggregate level to explain cross-sectional differences in wages among workers and spatial differences in average wages across regions within a country.info:eu-repo/semantics/publishedVersio

Towards a RISC-V Open Platform for Next-generation Automotive ECUs

The complexity of automotive systems is increasing quickly due to the integration of novel functionalities such as assisted or autonomous driving. However, increasing complexity poses considerable challenges to the automotive supply chain since the continuous addition of new hardware and network cabling is not considered tenable. The availability of modern heterogeneous multi-processor chips represents a unique opportunity to reduce vehicle costs by integrating multiple functionalities into fewer Electronic Control Units (ECUs). In addition, the recent improvements in open-hardware technology allow to further reduce costs by avoiding lock-in solutions. This paper presents a mixed-criticality multi-OS architecture for automotive ECUs based on open hardware and open-source technologies. Safety-critical functionalities are executed by an AUTOSAR OS running on a RISC-V processor, while the Linux OS executes more advanced functionalities on a multi-core ARM CPU. Besides presenting the implemented stack and the communication infrastructure, this paper provides a quantitative gap analysis between an HW/SW optimized version of the RISC-V processor and a COTS Arm Cortex-R in terms of real-time features, confirming that RISC-V is a valuable candidate for running AUTOSAR Classic stacks of next-generation automotive MCUs.Comment: 8 pages, 2023 12th Mediterranean Conference on Embedded Computing (MECO

Well-being Forecasting using a Parametric Transfer-Learning method based on the Fisher Divergence and Hamiltonian Monte Carlo

INTRODUCTION: Traditional personalised modelling typically requires sufficient personal data for training. This is a challenge in healthcare contexts, e.g. when using smartphones to predict well-being. OBJECTIVE: A method to produce incremental patient-specific models and forecasts even in the early stages of data collection when the data are sporadic and limited. METHODS: We propose a parametric transfer-learning method based on the Fisher divergence, where information from other patients is injected as a prior term into a Hamiltonian Monte Carlo framework. We test our method on the NEVERMIND dataset of self-reported well-being scores. RESULTS: Out of 54 scenarios representing varying training/forecasting lengths and competing methods, our method achieved overall best performance in 50 (92.6%) and demonstrated a significant median difference in45 (83.3%). CONCLUSION: The method performs favourably overall, particularly when long-term forecasts are required given short-term data

Polaronic and Mott insulating phase of layered magnetic vanadium trihalide VCl3

Two-dimensional (2D) van der Waals (vdW) magnetic $3d$-transition metal trihalides are a new class of functional materials showing exotic physical properties useful for spintronic and memory storage applications. This letter presents the synthesis and electromagnetic characterization of single-crystalline vanadium trichloride, VCl$_3$, a novel 2D layered vdW Mott insulator, which has a rhombohedral structure (R$\overline{3}$, No. 148) at room temperature. VCl$_3$ undergoes a structural phase transition at 103 K and a subsequent antiferromagnetic transition at 21.8 K. Combining core levels and valence bands X-ray Photoemission Spectroscopy (XPS) with first-principles Density Functional Theory (DFT) calculations, we demonstrate the Mott Hubbard insulating nature of VCl$_3$ and the existence of electron small 2D magnetic polarons localized on V atom sites by V-Cl bond relaxation. The polarons strongly affect the electromagnetic properties of VCl$_3$ promoting the occupation of dispersion-less spin-polarized V-3d $a_{1g}$ states and band inversion with $e^{'}_{g}$ states. Within the polaronic scenario, it is possible to interpret different experimental evidences on vanadium trihalides, such as VI$_3$, highlighting the complex physical behavior determined by correlation effects, mixed valence states, and magnetic states

A High-performance, Energy-efficient Modular DMA Engine Architecture

Data transfers are essential in today's computing systems as latency and complex memory access patterns are increasingly challenging to manage. Direct memory access engines (DMAEs) are critically needed to transfer data independently of the processing elements, hiding latency and achieving high throughput even for complex access patterns to high-latency memory. With the prevalence of heterogeneous systems, DMAEs must operate efficiently in increasingly diverse environments. This work proposes a modular and highly configurable open-source DMAE architecture called intelligent DMA (iDMA), split into three parts that can be composed and customized independently. The front-end implements the control plane binding to the surrounding system. The mid-end accelerates complex data transfer patterns such as multi-dimensional transfers, scattering, or gathering. The back-end interfaces with the on-chip communication fabric (data plane). We assess the efficiency of iDMA in various instantiations: In high-performance systems, we achieve speedups of up to 15.8x with only 1 % additional area compared to a base system without a DMAE. We achieve an area reduction of 10 % while improving ML inference performance by 23 % in ultra-low-energy edge AI systems over an existing DMAE solution. We provide area, timing, latency, and performance characterization to guide its instantiation in various systems.Comment: 14 pages, 14 figures, accepted by an IEEE journal for publicatio