Class-AB rail-to-rail CMOS buffer with bulk-driven super source followers

This paper describes a rail-to-rail CMOS analog voltage buffer designed to have extremely low static current consumption as well as high current drive capability. The buffer employs a complementary pair of super source followers, but a bulk-driven input device with the replica-biased scheme is utilized to eliminate the DC level shift, quasi-floating gate transistors to achieve class-AB performance, and a current switch which shifts between the complementary pair to allow rail-to-rail operation. The proposed buffer has been designed for a 0.35 mum CMOS technology to operate at a 1.8 V supply voltage. The simulated results are provided to demonstrate that the total harmonic distortion for a 1.6 Vpp 100 kHz sine wave with a 68 pF load is as low as -46 dB, whilst the static current consumption remains under 8 muA

A General Formula for Impulse-Invariant Transformation for Continuous-Time Delta-Sigma Modulators

this paper presents a generalised new formula for impulse-invariant transformation which can be used to convert an nth-order Discrete-Time (DT) ΔΣ modulator to an nth-order equivalent Continuous-Time (CT) ΔΣ modulator. Impulse-invariant transformation formulas have been published in many open literature articles for s-domain to z-domain conversion and vice-versa. However, some of the published works contain omissions and oversights. To verify the newly derived formulas, very many designs of varying orders have been tested and a representative 4th-order single-loop DT ΔΣ modulator converted to an equivalent CT ΔΣ modulator through the new formulas are presented in this paper. The simulation results confirm that the CT ΔΣ modulator which has been derived by these formulas works in accordance with the initial DT specifications without any noticeable degradation in performance in comparison to its original DT ΔΣ modulator prototype

Simulating the Effects of Skin Thickness and Fingerprints to Highlight Problems with Non-invasive RF Blood Glucose Sensing from Fingertips

The non-invasive measurement of blood glucose is a popular research topic where RF/microwave sensing of glucose is one of the promising methods in this area. From the many available measurement sites in the human body, fingertips appear to be a good choice due to a good amount of fresh blood supply and homogeneity in terms of biological layers present. The non-invasive RF measurement of blood glucose relies on the detection of the change in the permittivity of the blood using a resonator as a sensor. However, the change in the permittivity of blood due to the variation in glucose content has a limited range resulting in a very small shift in the sensor’s frequency response. Any inconsistency between measurements may hinder the measurement results. These inconsistencies mostly arise from the varied thickness of the biological layers and variation of fingerprints that are unique to every human. Therefore, the effects of biological layers and fingerprints in fingertips were studied in detail and are reported in this paper

Using positive feedback adiabatic logic to implement reversible Toffoli gates

A reversible, positive feedback adiabatic logic circuit is presented, which by implementing the universal Toffoli gate demonstrates that reversible logic circuits can be created and implemented using this adiabatic logic family. When compared to circuits with similar circuit structures that do not incorporate complete recovery logic, the use of reversible structures shows a reduction in energy losses by a mean of just under 63%

Bulk-driven flipped voltage follower

A voltage buffer so-called the bulk-driven flipped voltage follower is presented. This proposal is based on the flipped voltage follower (FVF) technique, but a bulk-driven MOSFET with the replica-biased scheme is utilized for the input device to eliminate the DC level shift. The proposed buffer has been designed and simulated with a 0.35 mum CMOS technology. The input current and capacitance of our proposal are 1.5 pA and 9.3 fF respectively, and with 0.8 V peak-to-peak 500 kHz input, the total harmonic distortion is 0.5% for a 10 pF load. This circuit can operate from a single 1.2 V power supply and consumes only 2.5 muA

A Viterbi decoder with low-power trace-back memory structure for wireless pervasive communications

This paper presents a new trace-back memory structure for Viterbi decoders that reduces power consumption by 63% compared to the conventional RAM based design. Instead of the intensive read and write operations as required in RAM based designs, the new memory is based on an array of registers connected with trace-back signals that decode the output bits on the fly. The structure is used together with appropriate clock and power-aware control signals. Based on a 0.35 /spl mu/m CMOS implementation the trace-back back memory consumes energy of 182 pJ

A Novel Pressure Sensing Circuit for Non-invasive RF/Microwave Blood Glucose Sensors

A novel pressure sensing circuit for non-invasive RF/microwave blood glucose sensors is presented in this paper. RF sensors are of interest to researchers for measuring blood glucose levels non-invasively. For the measurements, the finger is a popular site that has a good amount of blood supply. When a finger is placed on top of the RF sensor, the electromagnetic fields radiating from the sensor interact with the blood in the finger and the resulting sensor response depends on the permittivity of the blood. The varying glucose level in the blood results in a permittivity change causing a shift in the sensor’s response. Therefore, by observing the sensor’s frequency response it may be possible to predict the blood glucose level. However, there are two crucial points in taking and subsequently predicting the blood glucose level. These points are; the position of the finger on the sensor and the pressure applied onto the sensor. A variation in the glucose level causes a very small frequency shift. However, finger positioning and applying inconsistent pressure have more pronounced effect on the sensor response. For this reason, it may not be possible to take a correct reading if these effects are not considered carefully. Two novel pressure sensing circuits are proposed and presented in this paper to accurately monitor the pressure applied

Structured tone mitigation in 3rd and 4th order MASH Delta-Sigma Modulators-comparative study

A delta-sigma modulator (DSM) can be thought as a nonlinear chaotic system that may exhibit tonal behaviour in its output spectrum. These tones are sometimes referred to as spurs and they are undesirable. To provide for the mitigation of structured tones, application of dithering, using chaotic modulators, loading irrational initial conditions and maintaining controllable maximum sequence lengths are commonly used and advised methods primarily in Multi-stAge noise SHaping (MASH) DSMs. Higher order MASH-DSMs are less problematic and are commonly used in many high speed and low noise frequency synthesiser circuits. As MASH is composed of cascaded first order digital DSM stages, it is unconditionally stable. In this paper, the tone mitigation techniques for MASH 1-1-1 and MASH 1-1-1-1 modulators are compared and their noise performances presented

A 28mW 320MHz 3rd–Order Continuous-Time Time-Interleaved Delta-Sigma Modulator with 10MHz Bandwidth and 12 Bits of Resolution

this paper presents a 3rd-order two-path Continuous-Time Time-Interleaved (CTTI) delta-sigma modulator which is implemented in standard 90nm CMOS technology. The architecture uses a novel method to solve the delayless feedback path issue arising from the sharing of integrators between paths. The clock frequency of the modulator is 320MHz but integrators, quantizers and DACs operate at 160MHz. The modulator achieves a dynamic range of 12 bits over a bandwidth of 10MHz and dissipates only 28mW of power from a 1.8-V supply

Design of a Delayless Feedback Path Free 2nd-order Two-Path Time-Interleaved Discrete-Time Delta-Sigma Modulator- a New Approach

This paper presents the design procedure for a 2nd_order two-path Discrete-Time Time-Interleaved (DTTI) ΔΣ modulator from a conventional single-loop 2nd-order Discrete-Time (DT) ΔΣ modulator through the use of time domain equations and time-interleaving concepts [1]. The resulting modulator is free from the delayless feedback path and has only one set of integrators. The delayless feedback path issue in Time-Interleaved (TI) ΔΣ modulators is a critical restriction for the implementation of TI ΔΣ modulators and is effectively eliminated through the use of the approach proposed in this paper. The DTTI ΔΣ modulator requires only three op-amps and two quantizers both of which work concurrently, in comparison to the single-loop DT counterpart that also deploys two op-amps. For an OverSampling Ratio (OSR) of 16 and a clock frequency of 640MHz, our simulation results show a maximum Signal-to-Noise Ratio (SNR) for the DTTI ΔΣ modulator to be 70.5dB with an input bandwidth of 20MHz which has 15dB improvement in comparison to its single-loop, single-path DT counterpart