Trapped radiation detector - Mariner 5

Trapped radiation detector developed for Mariner 5 space prob

Lucky Microseconds:A Timing Attack on Amazon’s s2n Implementation of TLS

s2n is an implementation of the TLS protocol that was released in late June 2015 by Amazon. It is implemented in around 6,000 lines of C99 code. By comparison, OpenSSL needs around 70,000 lines of code to implement the protocol. At the time of its release, Amazon announced that s2n had undergone three external security evaluations and penetration tests. We show that, despite this, s2n - as initially released - was vulnerable to a timing attack in the case of CBC-mode ciphersuites, which could be extended to complete plaintext recovery in some settings. Our attack has two components. The first part is a novel variant of the Lucky 13 attack that works even though protections against Lucky 13 were implemented in s2n. The second part deals with the randomised delays that were put in place in s2n as an additional countermeasure to Lucky 13. Our work highlights the challenges of protecting implementations against sophisticated timing attacks. It also illustrates that standard code audits are insufficient to uncover all cryptographic attack vectors

Low charge noise quantum dots with industrial CMOS manufacturing

Silicon spin qubits are among the most promising candidates for large scale quantum computers, due to their excellent coherence and compatibility with CMOS technology for upscaling. Advanced industrial CMOS process flows allow wafer-scale uniformity and high device yield, but off the shelf transistor processes cannot be directly transferred to qubit structures due to the different designs and operation conditions. To therefore leverage the know-how of the micro-electronics industry, we customize a 300mm wafer fabrication line for silicon MOS qubit integration. With careful optimization and engineering of the MOS gate stack, we report stable and uniform quantum dot operation at the Si/SiOx interface at milli-Kelvin temperature. We extract the charge noise in different devices and under various operation conditions, demonstrating a record-low average noise level of 0.61 ${\mu}$eV/${\sqrt{Hz}}$ at 1 Hz and even below 0.1 ${\mu}$eV/${\sqrt{Hz}}$ for some devices and operating conditions. By statistical analysis of the charge noise with different operation and device parameters, we show that the noise source can indeed be well described by a two-level fluctuator model. This reproducible low noise level, in combination with uniform operation of our quantum dots, marks CMOS manufactured MOS spin qubits as a mature and highly scalable platform for high fidelity qubits.Comment: 22 pages, 13 figure

Pseudo Constant Time Implementations of TLS Are Only Pseudo Secure

Today, about 10% of TLS connections are still using CBC-mode cipher suites, despite a long history of attacks and the availability of better options (e.g. AES-GCM). In this work, we present three new types of attack against four popular fully patched implementations of TLS (Amazon\u27s s2n, GnuTLS, mbed TLS and wolfSSL) which elected to use ``pseudo constant time\u27\u27 countermeasures against the Lucky 13 attack on CBC-mode. Our attacks combine several variants of the PRIME+PROBE cache timing technique with a new extension of the original Lucky 13 attack. They apply in a cross-VM attack setting and are capable of recovering most of the plaintext whilst requiring only a moderate number of TLS connections. Along the way, we uncovered additional serious (but easy to patch) bugs in all four of the TLS implementations that we studied; in three cases, these bugs lead to Lucky 13 style attacks that can be mounted remotely with no access to a shared cache. Our work shows that adopting pseudo constant time countermeasures is not sufficient to attain real security in TLS implementations in CBC mode

Error Oracle Attacks on CBC Mode: Is There a Future for CBC Mode Encryption?

This paper is primarily concerned with the CBC block cipher mode. The impact on the usability of this mode of recently proposed padding oracle attacks, together with other related attacks described in this paper, is considered. For applications where unauthenticated encryption is required, the use of CBC mode is compared with its major symmetric rival, namely the stream cipher. It is argued that, where possible, authenticated encryption should be used, and, where this is not possible, a stream cipher would appear to be a superior choice. This raises a major question mark over the future use of CBC mode, except as part of a more complex mode designed to provide authenticated encryption

Study of Ge-Sb-Te alloy etch process for phase-change memories integrated into the 28 nm technology node

Les mémoires ont très largement gagné en notoriété ces dernières années et sont désormais incontournables dans tous les systèmes électroniques avec lesquels nous interagissons dans la vie quotidienne. Pour pallier les limitations technologiques des mémoires traditionnelles, de nombreux acteurs industriels ont orienté leur développement vers les Mémoires à Changement de Phase (PCM). Le fonctionnement de cette technologie émergente repose principalement sur les propriétés d’un alliage chalcogénure type Ge-Sb-Te (GST). Selon la composition chimique du matériau GST, les caractéristiques de la mémoire adressent différents marchés. Il est donc impératif que le matériau GST demeure intègre au cours des étapes d’élaboration de la cellule mémoire afin de satisfaire aux performances attendues. C’est un point critique à prendre en compte dans le procédé de fabrication du composant.L’objectif de cette thèse est de comprendre les interactions matériau – environnement susceptibles de menacer la stabilité chimique du GST et de proposer des solutions pour s’opposer aux effets les plus néfastes. Dans un premier temps, nous nous sommes intéressés à l’impact de la gravure plasma sur le matériau GST par l’étude comparative de trois chimies halogènes à base de HBr, Cl2 et CF4. Grâce aux résultats complémentaires des techniques XPS, PP-TOFMS et AFM, nous avons montré que la gravure HBr permet de minimiser les modifications chimiques et morphologiques de la surface du GST. Dans un second temps, nous avons cherché à comprendre comment le matériau GST réagissait aux différents procédés intervenant après l’étape de gravure. Il a été démontré que l’exposition du GST à un environnement oxydant (plasma O2 ou air) induit une oxydation critique détériorant les propriétés de changement de phase du matériau. De plus, le traitement chimique utilisé pour nettoyer les flancs de la structure PCM élimine sélectivement l’oxyde de GST et peut, en conséquence, altérer la morphologie des cellules mémoires. Pour éviter ces effets, nous avons proposé plusieurs solutions de procédé plasma capables de préserver la composition chimique du GST au cours du procédé d’élaboration de la structure PCM. En particulier, nous avons pu tirer profit des avantages que constitue l’ajout de CH4 dans le plasma. Il contribue à créer une couche de passivation lors de la gravure du GST ou est utilisé comme précurseur d’un dépôt de protection. Le développement d’une chimie de gravure alternative en H2-N2-Ar a également été abordé et représente une perspective intéressante.Memories have gained a lot of influence through these last years and are present in all electronic systems used in our daily life. To address the limitations of the traditional memory technologies, many industries are dedicating their researches to the development of the Phase-Change Memories (PCM). This emerging technology mainly uses the properties of a Ge-Sb-Te based-chalcogenide alloy (GST). The memory characteristics may change according to the GST chemical composition. This is a critical point to carefully consider for the manufacturing process of the component. Indeed, it is crucial to preserve as much as possible the GST integrity all along the patterning steps of the memory cell in order to preserve the device performances.This thesis work aims at understanding the material – environment interactions likely to impact the GST chemical stability and propose some improvements to the processes that are detrimental for the material. Firstly, we have focused on the plasma etching effects on the GST alloy through the comparative study of three halogen chemistries, HBr, Cl2 et CF4. Thanks to the complementary results from XPS, PP-TOFMS and AFM measurements, the HBr chemistry was identified as the best etching strategy for limiting damages at the GST surface. Secondly, we have investigated the GST interactions with the different environments implemented during the subsequent fabrication processes. The GST exposition to an oxidizing environment (O2 based-plasma or air) induces a critical oxidation damaging the phase-change properties. Besides, the chemical treatment used to clean the PCM sidewalls removes selectively the GST oxide and, consequently, can modify the memory cell morphology. To prevent these effects, several plasma solutions are suggested in order to maintain the chemical stability of the GST material during the PCM patterning process. In particular, knowing the benefits of a CH4 plasma, we propose to either integrate it into a passivating etching process or to use it as a precursor promoting a protection layer. The development of an alternative etching chemistry in H2-N2-Ar has also been discussed and opens an interesting perspective

Etude du procédé de gravure de l'alliage Ge-Sb-Te pour les mémoires à changement de phase

Memories have gained a lot of influence through these last years and are present in all electronic systems used in our daily life. To address the limitations of the traditional memory technologies, many industries are dedicating their researches to the development of the Phase-Change Memories (PCM). This emerging technology mainly uses the properties of a Ge-Sb-Te based-chalcogenide alloy (GST). The memory characteristics may change according to the GST chemical composition. This is a critical point to carefully consider for the manufacturing process of the component. Indeed, it is crucial to preserve as much as possible the GST integrity all along the patterning steps of the memory cell in order to preserve the device performances.This thesis work aims at understanding the material – environment interactions likely to impact the GST chemical stability and propose some improvements to the processes that are detrimental for the material. Firstly, we have focused on the plasma etching effects on the GST alloy through the comparative study of three halogen chemistries, HBr, Cl2 et CF4. Thanks to the complementary results from XPS, PP-TOFMS and AFM measurements, the HBr chemistry was identified as the best etching strategy for limiting damages at the GST surface. Secondly, we have investigated the GST interactions with the different environments implemented during the subsequent fabrication processes. The GST exposition to an oxidizing environment (O2 based-plasma or air) induces a critical oxidation damaging the phase-change properties. Besides, the chemical treatment used to clean the PCM sidewalls removes selectively the GST oxide and, consequently, can modify the memory cell morphology. To prevent these effects, several plasma solutions are suggested in order to maintain the chemical stability of the GST material during the PCM patterning process. In particular, knowing the benefits of a CH4 plasma, we propose to either integrate it into a passivating etching process or to use it as a precursor promoting a protection layer. The development of an alternative etching chemistry in H2-N2-Ar has also been discussed and opens an interesting perspective.Les mémoires ont très largement gagné en notoriété ces dernières années et sont désormais incontournables dans tous les systèmes électroniques avec lesquels nous interagissons dans la vie quotidienne. Pour pallier les limitations technologiques des mémoires traditionnelles, de nombreux acteurs industriels ont orienté leur développement vers les Mémoires à Changement de Phase (PCM). Le fonctionnement de cette technologie émergente repose principalement sur les propriétés d’un alliage chalcogénure type Ge-Sb-Te (GST). Selon la composition chimique du matériau GST, les caractéristiques de la mémoire adressent différents marchés. Il est donc impératif que le matériau GST demeure intègre au cours des étapes d’élaboration de la cellule mémoire afin de satisfaire aux performances attendues. C’est un point critique à prendre en compte dans le procédé de fabrication du composant.L’objectif de cette thèse est de comprendre les interactions matériau – environnement susceptibles de menacer la stabilité chimique du GST et de proposer des solutions pour s’opposer aux effets les plus néfastes. Dans un premier temps, nous nous sommes intéressés à l’impact de la gravure plasma sur le matériau GST par l’étude comparative de trois chimies halogènes à base de HBr, Cl2 et CF4. Grâce aux résultats complémentaires des techniques XPS, PP-TOFMS et AFM, nous avons montré que la gravure HBr permet de minimiser les modifications chimiques et morphologiques de la surface du GST. Dans un second temps, nous avons cherché à comprendre comment le matériau GST réagissait aux différents procédés intervenant après l’étape de gravure. Il a été démontré que l’exposition du GST à un environnement oxydant (plasma O2 ou air) induit une oxydation critique détériorant les propriétés de changement de phase du matériau. De plus, le traitement chimique utilisé pour nettoyer les flancs de la structure PCM élimine sélectivement l’oxyde de GST et peut, en conséquence, altérer la morphologie des cellules mémoires. Pour éviter ces effets, nous avons proposé plusieurs solutions de procédé plasma capables de préserver la composition chimique du GST au cours du procédé d’élaboration de la structure PCM. En particulier, nous avons pu tirer profit des avantages que constitue l’ajout de CH4 dans le plasma. Il contribue à créer une couche de passivation lors de la gravure du GST ou est utilisé comme précurseur d’un dépôt de protection. Le développement d’une chimie de gravure alternative en H2-N2-Ar a également été abordé et représente une perspective intéressante