Gian Luca Gregori. Epigrafía anfiteatrale dell’Occidenre romano. II. Regiones Italiae VI-XI. Vetera 4. Roma, 1989, 176 Pp. XXVIII láms.

Sin resume

An Event-Driven Multi-Kernel Convolution Processor Module for Event-Driven Vision Sensors

Event-Driven vision sensing is a new way of sensing visual reality in a frame-free manner. This is, the vision sensor (camera) is not capturing a sequence of still frames, as in conventional video and computer vision systems. In Event-Driven sensors each pixel autonomously and asynchronously decides when to send its address out. This way, the sensor output is a continuous stream of address events representing reality dynamically continuously and without constraining to frames. In this paper we present an Event-Driven Convolution Module for computing 2D convolutions on such event streams. The Convolution Module has been designed to assemble many of them for building modular and hierarchical Convolutional Neural Networks for robust shape and pose invariant object recognition. The Convolution Module has multi-kernel capability. This is, it will select the convolution kernel depending on the origin of the event. A proof-of-concept test prototype has been fabricated in a 0.35 m CMOS process and extensive experimental results are provided. The Convolution Processor has also been combined with an Event-Driven Dynamic Vision Sensor (DVS) for high-speed recognition examples. The chip can discriminate propellers rotating at 2 k revolutions per second, detect symbols on a 52 card deck when browsing all cards in 410 ms, or detect and follow the center of a phosphor oscilloscope trace rotating at 5 KHz.Unión Europea 216777 (NABAB)Ministerio de Ciencia e Innovación TEC2009-10639-C04-0

Analytical operator solution of master equations describing phase-sensitive processes

We present a method of solving master equations which may describe, in their most general form, phase sensitive processes such as decay and amplification. We make use of the superoperator technique.Comment: 10 pages, LaTex, 3 figures, accepted for publication in International Journal of Modern Physics

Nuevas inscripciones romanas de Villamanta (Madrid)

Sin resume

CMOS OTA-C high-frequency sinusoidal oscillators

Several topology families are given to implement practical CMOS sinusoidal oscillators by using operational transconductance amplifier-capacitor (OTA-C) techniques. Design techniques are proposed taking into account the CMOS OTA's dominant nonidealities. Building blocks are presented for amplitude control, both by automatic gain control (AGC) schemes and by limitation schemes. Experimental results from 3- and 2- mu m CMOS (MOSIS) prototypes that exhibit oscillation frequencies of up to 69 MHz are obtained. The amplitudes can be adjusted between 1 V peak to peak and 100 mV peak to peak. Total harmonic distortions from 2.8% down to 0.2% have been measured experimentally.Comisión Interministerial de Ciencia y Tecnología ME87-000

VLSI implementation of a transconductance mode continuous BAM with on chip learning and dynamic analog memory

In this paper we present a complete VLSI Continuous-Time Bidirectional Associative Memory (BAM). The short term memory (STM) section is implemented using small transconductance four quadrant multipliers, and capacitors for the integrators. The long term memory (LTM) is built using an additional multiplier that uses locally available signals to perform Hebbian learning. The value of the learned weight is present at a capacitor for each synapse. After learning has been accomplished the value of the stored weight voltage can be refreshed using a simple AID-D/A conversion, which if done fast enough, will maintain the weight value within a discrete interval of the complete weight range. Such a discretization still allows good performance of the STM section after learning is finished

A modular T-mode design approach for analog neural network hardware implementations

A modular transconductance-mode (T-mode) design approach is presented for analog hardware implementations of neural networks. This design approach is used to build a modular bidirectional associative memory network. The authors show that the size of the whole system can be increased by interconnecting more modular chips. It is also shown that by changing the interconnection strategy different neural network systems can be implemented, such as a Hopfield network, a winner-take-all network, a simplified ART1 network, or a constrained optimization network. Experimentally measured results from CMOS 2-μm double-metal, double-polysilicon prototypes (MOSIS) are presented

On the Design of Voltage-Controlled Sinusoidal Oscillators Using OTA's

A unified systematic approach to the design of voltage-controlled oscillators using only operational transconductance amplifiers (OTA's) and capacitors is discussed in this paper. Two classical oscillator models, i.e., quadrature and bandpass-based, are employed to generate several oscillator structures. They are very appropriate for silicon monolithic implementations. The resulting oscillation frequencies are proportional to the transconductance of the OTA and this makes the reported structures well-suited for building voltage controlled oscillators (VCO's). Amplitude stabilization circuits using both automatic gain control (AGC) mechanisms and limitation schemes are presented which are compatible with the transconductance amplifier capacitor oscillator (TACO). Experimental results from bipolar breadboard and CMOS IC prototypes are included showing good potential of OTA-based oscillators for high frequency VCO operation.Comisión Interministerial de Ciencia y Tecnología ME87-000

Frequency tuning loop for VCOs

A frequency tuning circuit is introduced for VCOs (voltage-controlled oscillators) so that the final relationship between oscillating frequency and input control voltage is fixed and independent of nonidealities. This tuning loop is applied to an OTA-C sinusoidal VCO. Such an oscillator has an output frequency-input voltage relationship that depends on temperature, process parameters, and even amplitude of the oscillations. It is shown that, by adding the tuning loop, nonideal dependences will be minimized

Very high frequency CMOS OTA-C quadrature oscillators

An approach to the design of high-frequency monolithic voltage-controlled oscillators using operational transconductance amplifiers and capacitors is given. Results from two 3 μm CMOS prototypes are presented. Both frequency and amplitude of the oscillations can be tuned by means of control voltages. Programmable oscillator frequencies up to 56.1 MHz are obtained, and the amplitudes are adjustable between 1 V peak-to-peak and 100 mV peak-to-peak. Total harmonic distortions from 2.8% down to 0.2% were experimentally measured