48 research outputs found

    The protective influence of bilingualism on the recovery of phonological input processing in aphasia after stroke

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    Language-related potentials are increasingly used to objectify (mal)adaptive neuroplasticity in stroke-related aphasia recovery. Using preattentive [mismatch negativity (MMN)] and attentive (P300) phonologically related paradigms, neuroplasticity in sensory memory and cognitive functioning underlying phonological processing can be investigated. In aphasic patients, MMN amplitudes are generally reduced for speech sounds with a topographic source distribution in the right hemisphere. For P300 amplitudes and latencies, both normal and abnormal results have been reported. The current study investigates the preattentive and attentive phonological discrimination ability in 17 aphasic patients (6 monolinguals and 11 bilinguals, aged 41-71 years) at two timepoints during aphasia recovery. Between the two timepoints, a significant improvement of behavioral language performance in both languages is observed in all patients with the MMN latency at timepoint 1 as a predictive factor for aphasia recovery. In contrast to monolinguals, bilingual aphasic patients have a higher probability to improve their processing speed during rehabilitation, resulting in a shortening of the MMN latency over time, which sometimes progresses toward the normative values

    Multi-MGy total ionizing dose induced MOSFET variability effects on radiation hardened CMOS image sensor performances

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    MOSFETs variability in irradiated CIS up to 10 MGy (SiO2) is statistically investigated on about 65000 devices. Different variability sources are identified and the role played by the transistors composing the readout chain is clarified

    Vulnerability and Hardening Studies of Optical and Illumination Systems at MGy Dose Levels

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    In the framework of the fusion for energy radiation hard imaging system project, the main radiation effects affecting the image quality of a miniaturized complementary metal-oxide-semiconductor-based camera exposed to radiation doses up to 1 MGy(SiO 2 ) are investigated for ITER applications. The radiation effects related to two of the three subcomponents of the camera are investigated: the optical system (OS) and the illumination system (IS). Subsystem demonstrators have been manufactured selecting radiation tolerant or hardened materials and components to demonstrate the feasibility to withstand such high dose levels while fulfilling the ITER remote handling needs in terms of optical performances and miniaturization. Regarding the OS, the observed degradation of the radiation-hardened optical glasses used for the OS lenses is characterized in terms of both radiation-induced attenuation and radiation-induced refractive-index change. At the system level, impact of these phenomena on the OS demonstrator performances is discussed in terms of image contrast. Radiation test results highlight the high radiation tolerance of manufactured monochrome and color OS to both degradation mechanisms. Regarding the IS, the selected architecture consists in a ring of 20 commercially available light-emitting diodes (LEDs) with monochrome (amber) or white emissions. An appropriate choice for the LEDs allows designing an IS with the requested performances and slight degradation of its output power at the MGy dose levels. From the obtained results, developing miniaturized IS and OS subcomponents for MGy dose operation levels appears realistic using commercially available technologies and appropriate hardening procedures

    Frequency Synthesis for Fully Integrated Wireless Receivers in Deep Sub-Micron CMOS Technologies (Frequentie synthesizers voor volledig geïntegreerde draadloze ontvangers in diep-submicron CMOS technologieën)

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    Het gevoerde onderzoek past in het kader van de steeds verdergaande zoektocht naar kleinere, goedkopere, volledigere en daardoor vaak complexere geïntegreerde schakelingen. Met als ultiem doel de één-chip oplossing wordt gemikt op een monolithische integratie, m.a.w. het vermijden van zoveel mogelijk discrete componenten. Omwille van de lage kostprijs, laag vermogen en potentiële integratie samen met digitale functionaliteit, wordt gekozen voor Si CMOS technologieën in dit werk.Dit werk bespreekt één van de sleutelcomponenten van een dergelijk monolithisch systeem: de frequentie synthesizer. Als specifieke implementatiestijl voor de synthesizer wordt gekozen voor de fase gesloten lus (PLL).Op een systematische manier wordt het ontwerp van een lage ruis, laag vermogen frequentie synthesizer onderzocht. Een belangrijk onderdeel van een PLL vormt de generatie van het lokale kloksignaal. Daarom wordt de spanningsgestuurde oscillator (VCO) in meer detail behandeld. Een grafische ontwerp strategie is ontwikkeld die toelaat de optimale performantie te bereiken rekening houdend met alle ontwerpspecificaties.De PLL zelf wordt besproken op systeem en op circuitniveau. Een systematische ontwerpstrategie wordt gegeven die eveneens op grafische wijze de ontwerpruimte afbakent waarbinnen het optimale ontwerp zich bevindt. Het onderzoek wordt geïllustreerd met twee voorbeelden: het ontwerp van een PLL voor een GPS ontvanger en een laag vermogen synthesizer bruikbaar onder lage voedingsspanningen. Mogelijke toepassingen voor een dergelijk systeem zijn onder andere gedistribueerde sensornetwerken, interactief speelgoed, identificatie (RFID) Bij deze realisatie wordt naast het ontwerp voor lage voedingsspanning ook meer nadruk gelegd op het robuuste ontwerp van een dergelijk systeem om een maximaal productierendement te garanderen. Onder wisselende proces- en omgevingsvariabelen kunnen sommige systeemparameters immers sterk wijzigen.Dankwoord Abstract Symbols and Abbreviations Contents List of Figures List of Tables 1 Introduction 1.1 Wireless Communication 1.2 Frequency Synthesis 1.3 Outline of This Work 2 Transistor Modeling 2.1 Introduction 2.2 CMOS RF 2.3 MOSFET Model for Hand Calculations 2.4 CMOS switch 2.5 Alternative Gate Structures 2.6 Summary 3 Modeling of Passive Components 3.1 Introduction 3.2 Quality Factor 3.3 Inductors 3.4 Resistors 3.5 Capacitors 3.6 Varactors 3.7 Resonator Tanks 3.8 Summary 4 Jitter and Phase Noise in Communication Systems 4.1 Introduction 4.2 Timing Signals in Communication Systems 4.3 Timing Jitter and Phase Noise 4.4 Analysis and Modeling of Jitter and Phase Noise in Communication Systems 4.5 Timing Error Impact on Systems: Examples 4.6 Summary 5 Oscillators 5.1 Introduction 5.2 Classification 5.3 Oscillator Data Sheet 5.4 Figures of Merit 5.5 Harmonic Oscillators 5.6 LC Resonator Based Oscillators 5.7 Quadrature Oscillators 5.8 Examples 5.9 Summary 6 Phase Locked Loops 6.1 Introduction 6.2 Phase Locked Loop Fundamentals 6.3 Phase Locked Loop Non-Idealities 6.4 Phase Locked Loop Optimization 6.5 Phase Locked Loop for a GPS Receiver Front-End 6.6 Summary 7 GNSS: Global Navigation Satellite System 7.1 Introduction 7.2 The GPS system Architecture 7.3 The GPS Satellite data format 7.4 GNSS Augmentation and Modernization 7.5 GNSS signal structure 7.6 Basic GPS Receiver Structure 7.7 Design of a GPS RF Receiver Front-End 7.8 Summary 8 Low Voltage - Low Power Frequency Synthesis 8.1 Introduction 8.2 System Regulation and Specification 8.3 Low Power, Low Voltage Design Techniques 8.4 Low Power - Low Voltage Phase Locked Loop 8.5 Summary 9 General Conclusions Appendix A Equations for MOS Transistor Hand Calculation Models Appendix B Calculation of the transistor parameters for polygon shaped transistor layouts Appendix C Generating Power Law Spectra Appendix D Approximate Analytic Solution for the Van der Pol Oscillator Appendix E Mathematical treatment of spurious signals in a PLL Appendix F SSB vs. DSB Noise Analysis in Cascaded Systems Appendix G Potential Interference Sources for GPS/GNSS Receivers Appendix H Nederlandstalige Samenvatting List of Publications Bibliographystatus: publishe

    Denkmal ISBN 9080842427

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    Design and Functional Validation of a Complex Impedance Measurement Device for Characterization of Ultrasonic Transducers

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    This paper presents the design and practical implementation of a complex impedance measurement device capable of characterization of ultrasonic transducers. The device works in the frequency range used by industrial ultrasonic transducers which is below the measurement range of modern high end network analyzers. The device uses the Goertzel algorithm instead of the more common FFT algorithm to calculate the magnitude and phase component of the impedance under test. A theoretical overview is given followed by a practical approach and measurement results.status: publishe

    Mijnidee.be: Klantgedreven innovatie in 5 stappen

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    A 63,000 Q-factor relaxation oscillator with switched-capacitor integrated error feedback

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    There is a growing interest in implementing on-chip reference clock generators for low-cost low-power area-efficient SoCs, such as implantable biomedical devices and microcomputers. Relaxation oscillators are suitable candidates to generate such reference clocks due to their compact size, low power consumption and wide frequency tuning range. However, the poor phase noise performance and large long-term variation are two major problems that limit their application.status: publishe

    Design and assessment of a 6 ps-resolution time-to-digital converter with 5 MGy gamma-dose tolerance for LIDAR application

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    Time-to-Digital Converters (TDCs) are key building blocks in time-based mixed-signal systems, used for the digitization of analog signals in time domain. A short survey on state-of-the-art TDCs is given. A novel multi-stage noise-shaping (MASH) delta-sigma (δ,σ) TDC structure is proposed for applications in continuous-time pulsed time-of-flight (TOF) rangefinders for nuclear reactor remote sensing, which requires both high resolution and multi MGy gamma-dose radiation tolerance. The converter, implemented in 0.13 μm, achieves a time resolution of 5.6 ps and an ENOB of 11 bits, when the oversampling ratio (OSR) is 250. The TDC core consumes only 1.7 mW and occupies an area of 0.11 μm 2. Owing to the usage of circuit level radiation hardened-by-design techniques, such as passive RC oscillators and constant-g m biasing, the TDC exhibits enhanced radiation tolerance. At a low dose rate of 1.2 kGy/h, the frequency of the counting clock in the TDC remains constant up to at least 160 kGy. Even after a total dose of 3.4 MGy at a high dose rate of 30 kGy/h, the TDC still achieves a time resolution of 10.5 ps with an OSR of 250. © 2012 IEEE.status: publishe
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