A Comprehensive Study of the Hardware Trojan and Side-Channel Attacks in Three-Dimensional (3D) Integrated Circuits (ICs)

Three-dimensional (3D) integration is emerging as promising techniques for high-performance and low-power integrated circuit (IC, a.k.a. chip) design. As 3D chips require more manufacturing phases than conventional planar ICs, more fabrication foundries are involved in the supply chain of 3D ICs. Due to the globalized semiconductor business model, the extended IC supply chain could incur more security challenges on maintaining the integrity, confidentiality, and reliability of integrated circuits and systems. In this work, we analyze the potential security threats induced by the integration techniques for 3D ICs and propose effective attack detection and mitigation methods. More specifically, we first propose a comprehensive characterization for 3D hardware Trojans in the 3D stacking structure. Practical experiment based quantitative analyses have been performed to assess the impact of 3D Trojans on computing systems. Our analysis shows that advanced attackers could exploit the limitation of the most recent 3D IC testing standard IEEE Standard 1838 to bypass the tier-level testing and successfully implement a powerful TSV-Trojan in 3D chips. We propose an enhancement for IEEE Standard 1838 to facilitate the Trojan detection on two neighboring tiers simultaneously. Next, we develop two 3D Trojan detection methods. The proposed frequency-based Trojan-activity identification (FTAI) method can differentiate the frequency changes induced by Trojans from those caused by process variation noise, outperforming the existing time-domain Trojan detection approaches by 38% in Trojan detection rate. Our invariance checking based Trojan detection method leverages the invariance among the 3D communication infrastructure, 3D network-on-chips (NoCs), to tackle the cross-tier 3D hardware Trojans, achieving a Trojan detection rate of over 94%. Furthermore, this work investigates another type of common security threat, side-channel attacks. We first propose to group the supply voltages of different 3D tiers temporally to drive the crypto unit implemented in 3D ICs such that the noise in power distribution network (PDN) can be induced to obfuscate the original power traces and thus mitigates correlation power analysis (CPA) attacks. Furthermore, we study the side-channel attack on the logic locking mechanism in monolithic 3D ICs and propose a logic-cone conjunction (LCC) method and a configuration guideline for the transistor-level logic locking to strengthen its resilience against CPA attacks

Data-Driven and Model-Based Methods with Physics-Guided Machine Learning for Damage Identification

Structural health monitoring (SHM) has been widely used for structural damage diagnosis and prognosis of a wide range of civil, mechanical, and aerospace structures. SHM methods are generally divided into two categories: (1) model-based methods; (2) data-driven methods. Compared with data-driven SHM, model-based methods provide an updated physics-based numerical model that can be used for damage prognosis when long-term data is available. However, the performance of model-based methods is susceptible to modeling error in establishing the numerical model, which is usually unavoidable due to model simplification and omission. The major challenge of data-driven SHM methods lies in data insufficiency, e.g., lack of data covering as many as possible damage states, especially for large-scale structures. Hence, multi-site damage identification using data-driven methods can be more challenging as pattern recognition theoretically requires sufficient data from each damage scenario. The main objectives of this dissertation are to: (1) integrate model-based and data-driven SHM methods so that their shortcomings can be weakened while their respective merits can be preserved when implementing damage identification; (2) improve the accuracy of data-driven methods for multi-site damage identification with limited measured data. To achieve the first research objective, physics-guided machine learning (PGML) is proposed to improve the performance of pattern recognition in data-driven SHM with insufficient measured data. The results of model-based SHM (i.e., FE model updating) are taken as an implicit representation of physics underlying the monitored structure, which is incorporated into the learning process of a neural network model with the physics guidance introduced into the loss function. In addition to PGML, transfer learning (TL) is used to bridge the gap between the numerical and experimental domains of SHM. The distribution difference and manifold discrepancy between the two domains is minimized through TL as a means of domain adaptation. To improve the performance of multi-site damage identification in data-driven SHM, multi-label classification (MLC) and constrained independent component analysis(cICA) methods are applied to investigate the correlations between damage cases sharing common damaged sites. Finally, as a case study, a two-step strategy of identifying structural damage of offshore wind turbines via FE model updating is proposed

SECURING FPGA SYSTEMS WITH MOVING TARGET DEFENSE MECHANISMS

Field Programmable Gate Arrays (FPGAs) enter a rapid growth era due to their attractive flexibility and CMOS-compatible fabrication process. However, the increasing popularity and usage of FPGAs bring in some security concerns, such as intellectual property privacy, malicious stealthy design modification, and leak of confidential information. To address the security threats on FPGA systems, majority of existing efforts focus on counteracting the reverse engineering attacks on the downloaded FPGA configuration file or the retrieval of authentication code or crypto key stored on the FPGA memory. In this thesis, we extensively investigate new potential attacks originated from the untrusted computer-aided design (CAD) suite for FPGAs. We further propose a series of countermeasures to thwart those attacks. For the scenario of using FPGAs to replace obsolete aging components in legacy systems, we propose a Runtime Pin Grounding (RPG) scheme to ground the unused pins and check the pin status at every clock cycle, and exploit the principle of moving target defense (MTD) to develop a hardware MTD (HMTD) method against hardware Trojan attacks. Our method reduces the hardware Trojan bypass rate by up to 61% over existing solutions at the cost of 0.1% more FPGA utilization. For general FPGA applications, we extend HMTD to a FPGA-oriented MTD (FOMTD) method, which aims for thwarting FPGA tools induced design tampering. Our FOMTD is composed of three defense lines on user constraints file, random design replica selection, and runtime submodule assembling. Theoretical analyses and FPGA emulation results show that proposed FOMTD is capable to tackle three levels’ attacks from malicious FPGA design software suite

CoolCloud: improving energy efficiency in virtualized data centers

In recent years, cloud computing services continue to grow and has become more pervasive and indispensable in people\u27s lives. The energy consumption continues to rise as more and more data centers are being built. How to provide a more energy efficient data center infrastructure that can support today\u27s cloud computing services has become one of the most important issues in the field of cloud computing research. In this thesis, we mainly tackle three research problems: 1. how to achieve energy savings in a virtualized data center environment; 2. how to maintain service level agreements; 3. how to make our design practical for actual implementation in enterprise data centers. Combining all the studies above, we propose an optimization framework named CoolCloud to minimize energy consumption in virtualized data centers with the service level agreement taken into consideration. The proposed framework minimizes energy at two different layers: (1) minimize local server energy using dynamic voltage \& frequency scaling (DVFS) exploiting runtime program phases. (2) minimize global cluster energy using dynamic mapping between virtual machines (VMs) and servers based on each VM\u27s resource requirement. Such optimization leads to the most economical way to operate an enterprise data center. On each local server, we develop a voltage and frequency scheduler that can provide CPU energy savings under applications\u27 or virtual machines\u27 specified SLA requirements by exploiting applications\u27 run-time program phases. At the cluster level, we propose a practical solution for managing the mappings of VMs to physical servers. This framework solves the problem of finding the most energy efficient way (least resource wastage and least power consumption) of placing the VMs considering their resource requirements

Modeling and understanding of directional friction on a fully lubricated surface with regular anisotropic asperities

Traditional tribology is based on the surface with random micro structures due to limitations of manufacturing technology. The modern manufacturing technology now promises to fabricate surfaces with regular micro structures (or asperities). The word ‘asperity’ refers to a single physical entity on the surface of a material, contributing to a concept called roughness in traditional tribology. Regular asperity surfaces imply that all asperities on the surface of a material have the same shape and size, and a deterministic distribution over the surface. The emergence of regular asperity surfaces will have a transformative impact to the discipline of tribology. The overall objective of this thesis is to study how the regular asperity would affect the tribological behavior. Specifically, this thesis develops a computational model to demonstrate and characterize the effect of the surface with regular anisotropic asperities (RAA) on the directional friction behavior when the surface is in a fully lubricated state. By directional friction, it is meant that friction force changes its magnitude with the change of the relative motion direction. By anisotropic asperity, it is meant that the geometry of the asperity is not symmetrical along the motion direction. This thesis presents a detailed development of the computational model by employing computational fluid dynamics (CFD) techniques. In particular, the model takes the Navier-Stokes (NS) equation as a governing equation and the Half-Sommerfeld Condition (HSC) to represent fluid behavior in the cavitation region; as such the model is named NS-HSC for short. Verification of the NS-HSC model is conducted with the information available in literature. A theory is proposed to explain the relationship between directional friction behavior and specific RAA structures. The thesis concludes: (1) the NS-HSC model is more accurate than the existing model in the literature and can be used to predict directional friction behavior and to design RAA surfaces, and (2) the proposed theory is excellent consistent with the NS-HSC model and thus useful to analysis and design of RAA surfaces for directional friction. The major contributions of this thesis are: (1) the first model in the field of tribology to predict the directional friction behavior for RAA surfaces under a fully lubricated status, (2) the first investigation, in the field of CFD, into combining the NS and HSC for modeling a laminar flow with cavitation, and (3) the first theory in the field of tribology for directional friction on fully lubricated RAA surfaces

Local characterization and engineering of proximitized correlated states in graphene-NbSe2_2 vertical heterostructures

Using a van der Waals vertical heterostructure consisting of monolayer graphene, monolayer hBN and NbSe$_2$, we have performed local characterization of induced correlated states in different configurations. At a temperature of 4.6 K, we have shown that both superconductivity and charge density waves can be induced in graphene from NbSe2 by proximity effects. By applying a vertical magnetic field, we imaged the Abrikosov vortex lattice and extracted the coherence length for the proximitized superconducting graphene. We further show that the induced correlated states can be completely blocked by adding a monolayer hBN between the graphene and the NbSe$_2$, which demonstrates the importance of the tunnel barrier and surface conditions between the normal metal and superconductor for the proximity effect.Comment: 7 pages, 5 figure