214 research outputs found

    Analyzing capacitance-voltage measurements of vertical wrapped-gated nanowires

    Full text link
    The capacitance of arrays of vertical wrapped-gate InAs nanowires are analyzed. With the help of a Poisson-Schr"odinger solver, information about the doping density can be obtained directly. Further features in the measured capacitance-voltage characteristics can be attributed to the presence of surface states as well as the coexistence of electrons and holes in the wire. For both scenarios, quantitative estimates are provided. It is furthermore shown that the difference between the actual capacitance and the geometrical limit is quite large, and depends strongly on the nanowire material.Comment: 15 pages, 6 Figures included, to appear in Nanotechnolog

    InAs/GaSb vertical nanowire TFETs on Si for digital and analogue applications

    Get PDF
    Vertical InAs/GaSb nanowire TFETs with diameters of 20 nm and 25 nm have been fabricated and characterized. The influence of diameter, gate-placement, and nanowire numbers have been studied. The best device shows a subthreshold swing of 68 mV/dec at VDS = 0.3 V and 26 μA/μm at VDS = 0.3 V and VGS = 0.5 V. It achieves a self-gain larger than 100 with high transconductance efficiency

    High-frequency InGaAs tri-gate MOSFETs with fmax of 400 GHz

    Get PDF
    Extremely scaled down tri-gate RF metal-oxide-semiconductor field-effect transistors (MOSFETs) utilising lateral nanowires as the channel, with gate length and nanowire width both of 20 nm are reported. These devices exhibit simultaneous extrapolated ft and fmax of 275 and 400 GHz at VDS = 0.5 V, which is the largest combined ft and fmax, as well as the largest fmax reported for all III-V MOSFETs

    Vertical InAs/GaAsSb/GaSb tunneling field-effect transistor on Si with S = 48 mV/decade and Ion = 10 μA/μm for Ioff = 1 nA/μm at VDS = 0.3 V

    Get PDF
    We present a vertical nanowire InAs/GaAsSb/GaSb TFET with a highly scaled InAs diameter (20 nm). The device exhibits a minimum subthreshold swing of 48 mV/dec. for Vds = 0.1-0.5 V and achieves an Ion = 10.6 μA/μm for Ioff = 1 nA/μm at Vds = 0.3 V. The lowest subthreshold swing achieved is 44 mV/dec. at Vds= 0.05 V. Furthermore, a benchmarking is performed against state-of-the-art TFETs and MOSFETs demonstrating a record high I60 and performance benefits for Vds between 0.1 and 0.3 V

    Correlation-induced conductance suppression at level degeneracy in a quantum dot

    Get PDF
    The large, level-dependent g-factors in an InSb nanowire quantum dot allow for the occurrence of a variety of level crossings in the dot. While we observe the standard conductance enhancement in the Coulomb blockade region for aligned levels with different spins due to the Kondo effect, a vanishing of the conductance is found at the alignment of levels with equal spins. This conductance suppression appears as a canyon cutting through the web of direct tunneling lines and an enclosed Coulomb blockade region. In the center of the Coulomb blockade region, we observe the predicted correlation-induced resonance, which now turns out to be part of a larger scenario. Our findings are supported by numerical and analytical calculations.Comment: 5 pages, 4 figure

    High-k/InGaAs interface defects at cryogenic temperature

    Get PDF
    Oxide defects in the high-k/InGaAs MOS system are investigated. The behaviour of these traps is explored from room temperature down to 10 K. This study reveals that the exchange of free carriers between oxide states and either the conduction or the valence band is strongly temperature dependant. The capture and emission of electrons is strongly suppressed at 10 K as demonstrated by the collapse of the capacitance frequency dispersion in accumulation for n-InGaAs MOS devices, though hysteresis in the C-V sweeps is still present at 10 K. Phonon assisted tunnelling processes are considered in the simulation of electrical characteristics. The simulated data match very well the experimental characteristics and provide energy and spatial mapping of oxide defects. The multi phonon theory also help explain the impedance data temperature dependence. This study also reveals an asymmetry in the free carrier trapping between n and p type devices, where hole trapping is more significant at 10 K

    Vertical Enhancement-Mode InAs Nanowire Field-Effect Transistor With 50-nm Wrap Gate

    Full text link

    Analysis of strain and stacking faults in single nanowires using Bragg coherent diffraction imaging

    Full text link
    Coherent diffraction imaging (CDI) on Bragg reflections is a promising technique for the study of three-dimensional (3D) composition and strain fields in nanostructures, which can be recovered directly from the coherent diffraction data recorded on single objects. In this article we report results obtained for single homogeneous and heterogeneous nanowires with a diameter smaller than 100 nm, for which we used CDI to retrieve information about deformation and faults existing in these wires. The article also discusses the influence of stacking faults, which can create artefacts during the reconstruction of the nanowire shape and deformation.Comment: 18 pages, 6 figures Submitted to New Journal of Physic

    Provenance in Open Data Entity-Centric Aggregation

    Get PDF
    An increasing number of web services these days require combining data from several data providers into an aggregated database. Usually this aggregation is based on the linked data approach. On the other hand, the entity-centric model is a promising data model that outperforms the linked data approach because it solves the lack of explicit semantics and the semantic heterogeneity problems. However, current open data which is available on the web as raw datasets can not be used in the entity-centric model before processing them with an import process to extract the data elements and insert them correctly in the aggregated entity-centric database. It is essential to certify the quality of these imported data elements, especially the background knowledge part which acts as input to semantic computations, because the quality of this part affects directly the quality of the web services which are built on top of it. Furthermore, the aggregation of entities and their attribute values from different sources raises three problems: the need to trace the source of each element, the need to trace the links between entities which can be considered equivalent and the need to handle possible conflicts between different values when they are imported from various data sources. In this thesis, we introduce a new model to certify the quality of a back ground knowledge base which separates linguistic and language independent elements. We also present a pipeline to import entities from open data repositories to add the missing implicit semantics and to eliminate the semantic heterogeneity. Finally, we show how to trace the source of attribute values coming from different data providers; how to choose a strategy for handling possible conflicts between these values; and how to keep the links between identical entities which represent the same real world entity
    • …
    corecore