211 research outputs found

    On the time-dependent transport mechanism between surface traps and the 2DEG in AlGaN/GaN devices

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    The physical mechanisms involved in the trapping and de-trapping processes associated to surface donor traps in GaN transistors are discussed in this work. The paper challenges the conventional transient techniques adopted for extrapolating the trap energy level via experiments and TCAD simulations. Transient TCAD simulations were employed to reproduce the time-dependent electrical behavior of a Metal-on-Insulator Field-Effect-Transistor (MISFET) and explain the influence of the electric field and energy barrier on the transient time associated to the trapping and de-trapping mechanisms of surface traps. The comparison between three test-structures and the relative variation of the trapping and de-trapping times with the bias and trap parameters leads to the suggestion of a proposed test-structure and bias configuration to accurately extrapolate the energy level of surface traps in GaN transistors

    Design of a normally-off diamond JFET for high power integrated applications

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    © 2017 Elsevier B.V. Normally-on (depletion mode) and normally-off (enhancement mode) diamond Junction Field Effect Transistors (JFETs) have been analyzed by means of a commercially available TCAD software. First, the parameters used for describing the incomplete ionization, avalanche, and mobility models in diamond have been discussed and assessed against the state-of-the-art. The on- and off-state electrical characteristics of diamond JFETs have been simulated with the suggested parameter values and matched with a set of available experimental data. Secondly, an optimization technique which can improve the performance of an enhancement mode diamond JFET that operates in the unipolar conduction regime has been proposed. This method takes into account the unique properties and limitations of diamond and highlights the main issues that can arise from the design of a normally-off diamond JFET. In particular, the crucial effect of the high temperature on the performance of the normally-off JFET has been investigated. The adopted technique is mainly based on a design of TCAD experiments and no mathematical algorithms have been developed for the calculation of the optimized set of parameters

    Dynamic Provenance for SPARQL Update

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    While the Semantic Web currently can exhibit provenance information by using the W3C PROV standards, there is a "missing link" in connecting PROV to storing and querying for dynamic changes to RDF graphs using SPARQL. Solving this problem would be required for such clear use-cases as the creation of version control systems for RDF. While some provenance models and annotation techniques for storing and querying provenance data originally developed with databases or workflows in mind transfer readily to RDF and SPARQL, these techniques do not readily adapt to describing changes in dynamic RDF datasets over time. In this paper we explore how to adapt the dynamic copy-paste provenance model of Buneman et al. [2] to RDF datasets that change over time in response to SPARQL updates, how to represent the resulting provenance records themselves as RDF in a manner compatible with W3C PROV, and how the provenance information can be defined by reinterpreting SPARQL updates. The primary contribution of this paper is a semantic framework that enables the semantics of SPARQL Update to be used as the basis for a 'cut-and-paste' provenance model in a principled manner.Comment: Pre-publication version of ISWC 2014 pape

    Novel Approach Toward Plasma Enhancement in Trench-Insulated Gate Bipolar Transistors

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    In this letter, a trench-insulated gate bipolar transistor (IGBT) design with local charge compensating layers featured at the cathode of the device is presented and analyzed. The superjunction or reduced surface effect proves to be very effective in overcoming the inherited ON-state versus breakdown tradeoff appearing in conventional devices, such as the soft punch through plus or field stop plus (FS+) IGBTs. This design enhances the ON-state performance of the FS+IGBT by increasing the plasma concentration at the cathode side without affecting either the switching performance or the breakdown rating
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