63 research outputs found

    Efficient abstraction of clock synchronization at the operating system level

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    Distributed embedded systems are emerging and gaining importance in various domains, including industrial control applications where time determinism – hence network clock synchronization – is fundamental. In modern applications, moreover, this core functionality is required by many different software components, from OS kernel and radio stack up to applications. An abstraction layer devoted to handling time needs therefore introducing, and to encapsulate time corrections at the lowest possible level, the said layer should take the form of a timer device driver offering a Virtual Clock to the entire system. In this paper we show that doing so introduces a nonlinearity in the dynamics of the clock, and we design a controller based on feedback linearization to handle the issue. To put the idea to work, we extend the Miosix RTOS with a generic interface allowing to implement virtual clocks, including the newly designed controller that we call FLOPSYNC-3 after its ancestor. Also, we introduce the resulting virtual clock in the TDMH [20] real-time wireless mesh protocol

    Jitter-Compensated VHT and Its Application to WSN Clock Synchronization

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    Accurate and energy-efficient clock synchronization is an enabler for many applications of Wireless Sensor Networks. A fine-grained synchronization is beneficial both at the system level, for example to favor deterministic radio protocols, and at the application level, when network-wide event timestamping is required. However, there is a tradeoff between the resolution of a WSN node's timekeeping device and its energy consumption. The Virtual High-resolution Timer (VHT) is an innovative solution, that was proposed to overcome this tradeoff. It combines a high-resolution oscillator to a low-power one, turning off the former when not needed. In this paper we improve VHT by first identifying the jitter of the low-power oscillator as the current limit to the technique, and then proposing an enhanced solution that synchronizes the fast and the slow clock, rejecting the said jitter. The improved VHT is also less demanding than the original technique in terms of hardware resources. Experimental results show the achieved advantages in terms of accuracy

    A Retrospective Comparative Study in Patients With Cocaine Use Disorder Comorbid With Attention Deficit Hyperactivity Disorder Undergoing an rTMS Protocol Treatment

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    Background: Adult attention-deficit/hyperactivity disorder (ADHD) is associated with high comorbidity with other psychiatric diseases, including cocaine use disorder (CocUD). Given the common fronto-striatal dysfunction, ADHD patients often use cocaine as self-medication for ameliorating symptoms by increasing striatal dopamine release. Yet, comorbidity with ADHD is related to poor treatment outcomes. CocUD has been treated with transcranial magnetic stimulation (TMS), but no studies investigated the outcomes in patients comorbid with ADHD. Methods: Twenty-two ADHD/CocUD and 208 CocUD-only participants received a high-frequency (15 Hz) rTMS treatment stimulating the left-DLPFC. We investigated whether both groups of patients shared similar demographic and clinical characteristics at baseline. Then, we monitored the effect of treatment testing for potential differences between groups. Results: At baseline demographic, toxicology and clinical features were not different between the two groups except for global severity index (GSI from SCL-90): patients of ADHD/CocUD group reported higher general symptomatology compared to the CocUD-only group. Concerning the effect of treatment, both groups significantly improved over time regarding cocaine use, craving, and other negative affect symptoms. No differences were observed between groups. Conclusions: To our knowledge, this is the first study comparing the demographic characterization and rTMS clinical improvements of patients with a dual diagnosis of ADHD and CocUD against CocUD-only patients. Cocaine use and common self-reported withdrawal/abstinence symptoms appear to benefit from rTMS treatment with no differences between groups. Future studies are needed to further investigate these preliminary results

    Array-Aware Matching: Taming the Complexity of Large-Scale Simulation Models

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    Equation-based modelling is a powerful approach to tame the complexity of large-scale simulation problems. Equation-based tools automatically translate models into imperative languages. When confronted with nowadays' problems, however, well assessed model translation techniques exhibit scalability issues, that are particularly severe when models contain very large arrays. In fact, such models can be made very compact by enclosing equations into looping constructs, but reflecting the same compactness into the translated imperative code is not trivial. In this paper, we face this issue by concentrating on a key step of equations-to-code translation, the equation/variable matching. We first show that an efficient translation of models with (large) arrays needs awareness of their presence, by defining a figure of merit to measure how much the looping constructs are preserved along the translation. We then show that the said figure of merit allows to define an optimal array-aware matching, and as our main result, that the so stated optimal array-aware matching problem is NP-complete. As an additional result, we propose a heuristic algorithm capable of performing array-aware matching in polynomial time. The proposed algorithm can be proficiently used by model translator developers in the implementation of efficient tools for large-scale system simulation

    TEXTAROSSA: Towards EXtreme scale Technologies and Accelerators for euROhpc hw/Sw Supercomputing Applications for exascale

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    International audienceTo achieve high performance and high energy efficiency on near-future exascale computing systems, three key technology gaps needs to be bridged. These gaps include: energy efficiency and thermal control; extreme computation efficiency via HW acceleration and new arithmetics; methods andtools for seamless integration of reconfigurable accelerators in heterogeneous HPC multi-node platforms. TEXTAROSSA aims at tackling this gap through a co-design approach to heterogeneous HPC solutions, supported by the integration and extension of HW and SW IPs, programming models and tools derived from European research
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