Dimensioning of a multibeam coherent photonic beamformer fed by a phased array antenna.

The design and dimensioning of a photonic-aided payload for a multi-beam high-throughput communications satellite is a complex problem in which the antenna, RF and photonic subsystems must be considered as a whole for achieving best performance with lowest mass and power consumption. In this paper, we propose and dimension the receiving stage of a communications satellite comprising a phased array antenna (PAA) feeding a multibeam photonic beamforming system (PBS). The PBS uses a single wavelength and resorts to heterodyne detection such that the retrieved beams are frequency downconverted. End-to-end system modeling shows that the complexity of the PAA and PBS can be traded-off for signal-to-noise ratio (SNR) or power consumption without compromising the beam width. The dimensioning of a realistic scenario is presented, showing that an SNR and beam crosstalk on the order of 20 dB are achievable with a total power consumption below 1 kW for a typical number of 100 antenna elements (AEs)

Photonic Provisioning Using a Packaged SOI Hybrid All-Optical Wavelength Converter in a Meshed Optical Network Testbed

n/

A 112 Gb/s Radiation-Hardened Mid-Board Optical Transceiver in 130-nm SiGe BiCMOS for Intra-Satellite Links

We report the design of a 112 Gb/s radiation-hardened (RH) optical transceiver applicable to intra-satellite optical interconnects. The transceiver chipset comprises a vertical-cavity surface-emitting laser (VCSEL) driver and transimpedance amplifier (TIA) integrated circuits (ICs) with four channels per die, which are adapted for a flip-chip assembly into a mid-board optics (MBO) optical transceiver module. The ICs are designed in the IHP 130 nm SiGe BiCMOS process (SG13RH) leveraging proven robustness in radiation environments and high-speed performance featuring bipolar transistors (HBTs) with fT/fMAX values of up to 250/340 GHz. Besides hardening by technology, radiation-hardened-by-design (RHBD) components are used, including enclosed layout transistors (ELTs) and digital logic cells. We report design features of the ICs and the module, and provide performance data from post-layout simulations. We present radiation evaluation data on analog devices and digital cells, which indicate that the transceiver ICs will reliably operate at typical total ionizing dose (TID) levels and single event latch-up thresholds found in geostationary satellites

Modular coherent photonic-aided payload receiver for communications satellites

Ubiquitous satellite communications are in a leading position for bridging the digital divide. Fulfilling such a mission will require satellite services on par with fibre services, both in bandwidth and cost. Achieving such a performance requires a new generation of communications payloads powered by large-scale processors, enabling a dynamic allocation of hundreds of beams with a total capacity beyond 1 Tbit s−1. The fact that the scale of the processor is proportional to the wavelength of its signals has made photonics a key technology for its implementation. However, one last challenge hinders the introduction of photonics: while large-scale processors demand a modular implementation, coherency among signals must be preserved using simple methods. Here, we demonstrate a coherent photonic-aided receiver meeting such demands. This work shows that a modular and coherent photonic-aided payload is feasible, making way to an extensive introduction of photonics in next generation communications satellites

The H2020-SPACE-SIPHODIAS project: Space-grade optoelectronic interfaces for photonic digital and analogue very-high-throughput satellite payloads

The EU-SIPhoDiAS project deals with the development of critical photonic building blocks needed for high-performance and low size, weight, and power (SWaP) photonics-enabled Very High Throughput Satellites (VHTS). In this presentation, we report on the design and fabrication activities during the first year of the project concerning the targeted family of digital and microwave photonic components. This effort aims to demonstrate components of enhanced reliability at technology readiness level (TRL) 7. Specifically, with respect to microwave photonic links, we report: (i) the design of Ka and Q-bands analogue photodetectors that will be assembled in compact packages, allowing for very high bandwidth per unit area and (ii) on the design of compact V-band GaAs electro-optic modulator arrays, which use a folded-path optical configuration to manage all fiber interfaces packaged opposite direct in-line RF feeds for ease of board layouts and mass/size benefits. With respect to digital links, we report on the development of 100 Gb/s (4 x 25 Gb/s) digital optical transceiver sub-assemblies developed using flip-chip mounting of electronic and opto-parts on a high-reliability borosilicate substrate. The transceiver chipset developed specifically for this project refers to fully-custom 25 Gb/s radiation hard (RH) VCSEL driver and TIA ICs designed in IHP’s 130 nm SiGe BiCMOS Rad-Hard process

Integration of 150 Gbps/fiber optical engines based on multicore fibers and 6-channel VCSELs and PDs

Multicore fiber enables a parallel optic data link with a single optical fiber, thus providing an attractive way to increase the total throughput and the integration density of the interconnections. We study and present photonics integration technologies and optical coupling approaches for multicore transmitter and receiver subassemblies. Such optical engines are implemented and characterized using multimode 6-core fibers and multicore-optimized active devices: 850-nm VCSEL and PD arrays with circular layout and multi-channel driver and receiver ICs. They are developed for bit-rates of 25 Gbps/channel and beyond, i.e. <150 Gbps per fiber, and also optimized for ruggedized transceivers with extended operation temperature range, for harsh environment applications, including space

Photonic routing systems using hybrid integrated optical devices

This PhD thesis is dedicated to the development of photonic routing systems and focuses on the issue of optical contention resolution. In order to address the contention resolution problem, this thesis proposes a number of optical systems capable to handle the congestion of optical packets in the time, wavelength and space domains. The subsystems were simulated and implemented using hybrid integrated all-optical switches, wavelength converters and optical flip-flops. The first subsystem that was demonstrated was a packet envelope detection circuit compatible with both 10 and 40 Gb/s optical packets. This circuit was used in combination with optical switches to demonstrate deflection and wavelength conversion-based contention resolution for synchronous optical packets. In addition, a large scale optical system capable to resolve the contention between bursty packets was designed and demonstrated experimentally. The circuit operates on a FIFO mode and incorporates an all-optical latching mechanism to sort out contenting packets avoiding burst segmentation. Finally, a novel optical buffering system compatible with all-optical routers was designed and simulated. The system incorporated an optically controlled optical buffer and involved optical AND and XOR logic operations to control the state of a recirculating optical buffer utilizing all-optical space switches.Το ερευνητικό έργο της παρούσας διατριβής είναι αφιερωμένο στην ανάπτυξη οπτικών κυκλωμάτων δρομολόγησης πληροφοριών, εστιάζοντας στο σύνθετο πρόβλημα των συγκρούσεων στους φωτονικούς δρομολογητές. Για την επίλυση του προβλήματος προτείνεται μία σειρά κυκλωμάτων για τη διαχείριση των συγκρούσεων οπτικών πακέτων σε όλα τα πιθανά πεδία: το πεδίο του μήκους κύματος, το πεδίο του χώρου και το πεδίο του χρόνου. Τα κυκλώματα μοντελοποιήθηκαν και υλοποιήθηκαν συνδυάζοντας υβριδικά ολοκληρωμένους οπτικούς διακόπτες, μετατροπείς μήκους κύματος και οπτικά στοιχεία μνήμης. Πρώτο κατά σειρά υλοποιήθηκε κύκλωμα ανάκτησης περιβάλλουσας συμβατό τόσο με 10 Gb/s όσο και με 40 Gb/s οπτικά πακέτα. Το κύκλωμα χρησιμοποιήθηκε σε συνδυασμό με οπτικούς διακόπτες και μετατροπείς μήκους κύματος για την επίδειξη κυκλώματος επίλυσης της σύγκρουσης σύγχρονων οπτικών πακέτων στο πεδίο του χώρου και του μήκους κύματος. Επίσης σχεδιάστηκε και υλοποιήθηκε ένα οπτικό κύκλωμα μεγάλης κλίμακας ικανό να δρομολογεί ασύγχρονα πακέτα μεταβλητού μήκους με αποφυγή συγκρούσεων. Το κύκλωμα περιλαμβάνει έναν πρωτότυπο μηχανισμό οπτικού μανδαλωτή και λειτουργεί σε First-in-first-out (FIFO) λογική. Τέλος σχεδιάστηκε και μοντελοποιήθηκε πρωτότυπο κύκλωμα ανίχνευσης συγκρούσεων και αποθήκευσης οπτικών πακέτων συμβατό με αμιγώς οπτικούς δρομολογητές. Το κύκλωμα περιλαμβάνει ένα οπτικά ελεγχόμενο σύστημα αποθήκευσης πακέτων αποτελούμενο από οπτικούς χωρικούς διακόπτες, πύλες AND και XOR καθώς και μία οπτική γραμμή καθυστέρησης

Generation of 40-GHz control signals from flag pulses for switching alloptical gates for use with optical packets

We demonstrate an all-optical circuit capable of generating 40-GHz control signals from f lag pulses that can be used to define the switching state of all-optical gates for use with optical packets. The circuit comprises a Fabry -Perot filter and a semiconductor optical amplifier, and with a single pulse it can generate 12 control pulses with 0.64-dB amplitude modulation. With two and three f lag pulses the number of control pulses becomes 36 and 54, respectively

Photonic Routing Systems Using All-optical, Hybrid Integrated Wavelength Converter Arrays

Abstract—The integration of a new generation of all-optical wavelength converters within European project IST-MUFINS has enabled the development of compact and multi-functional photonic processing systems. Here we present the realization of demanding functionalities required in high-capacity photonic routers using these highly integrated components including: Clock recovery, data/label recovery, wavelength routing and contention resolution; all implemented with multi-signal processing using a single photonic chip – a quadruple array of SOA-MZI wavelength converters which occupies a chip area of only 15 x 58 mm 2. In addition, we present the capability of the technology to build WDM signal processing systems with the simultaneous operation of four quad devices in a four wavelength burst-mode regenerator. Finally, the potential of the technology to provide photonic systems-onchip is demonstrated with the first hybrid integrated alloptical burst-mode receiver prototype. Index Terms — photonic routers, optical packet switching, all-optical wavelength converters, photonic integration, silicon optical bench, silica-on-silicon, functional integration I