Field plate optimization in low-power high-gain source-gated transistors

Source-gated transistors (SGTs) have potentially very high output impedance and low saturation voltages, which make them ideal as building blocks for high-performance analog circuits fabricated in thin-film technologies. The quality of saturation is greatly influenced by the design of the field-relief structure incorporated into the source electrode. Starting from measurements on self-aligned polysilicon structures, we show through numerical simulations how the field plate (FP) design can be improved. A simple source FP around 1 μm long situated several tens of nanometers above the semiconductor can increase the low-voltage intrinsic gain by more than two orders of magnitude and offers adequate tolerance to process variations in a moderately scaled thin-film SGT. © 2012 IEEE

Solution processable multi-channel ZnO nanowire field-effect transistors with organic gate dielectric

The present work focuses on nanowire (NW) applications as semiconducting elements in solution processable field-effect transistors (FETs) targeting large-area low-cost electronics. We address one of the main challenges related to NW deposition and alignment by using dielectrophoresis (DEP) to select multiple ZnO nanowires with the correct length, and to attract, orientate and position them in predefined substrate locations. High-performance top-gate ZnO NW FETs are demonstrated on glass substrates with organic gate dielectric layers and surround source–drain contacts. Such devices are hybrids, in which inorganic multiple single-crystal ZnO NWs and organic gate dielectric are synergic in a single system. Current–voltage (I–V) measurements of a representative hybrid device demonstrate excellent device performance with high on/off ratio of ~107, steep subthreshold swing (s-s) of ~400 mV/dec and high electron mobility of ~35 cm2 V−1 s−1 in N2 ambient. Stable device operation is demonstrated after 3 months of air exposure, where similar device parameters are extracted including on/off ratio of ~4 × 106, s-s ~500 mV/dec and field-effect mobility of ~28 cm2 V−1 s−1. These results demonstrate that DEP can be used to assemble multiples of NWs from solvent formulations to enable low-temperature hybrid transistor fabrication for large-area inexpensive electronics

High-resolution temperature sensing with source-gated transistors

Source-gated transistors (SGTs) are three-terminal devices in which the current is controlled by a potential barrier at the source. The gate voltage is used primarily to modulate the effective height of the source barrier. These devices have a number of operational advantages over conventional field-effect transistors, including a potentially much smaller saturation voltage and very low output conductance in saturation, which lead to low power operation and high intrinsic gain

Hybrid Multipixel Array X-Ray Detectors for Real-Time Direct Detection of Hard X-Rays

X-ray detectors currently employed in dosimetry suffer from a number of drawbacks including the inability to conform to curved surfaces and being limited to smaller dimensions due to available crystal sizes. In this study, a hybrid X-ray detector (HXD) has been developed which offers real-time response with added advantages of being highly sensitive over a broad energy range, mechanically flexible, relatively inexpensive, and able to be fabricated over large areas on the desired surface. The detector comprises an organic matrix embedded with high-atomic-number inorganic nanoparticles which increase the radiation attenuation and within the device allows for simultaneous transfer of electrons and holes. The HXD delivers a peak response of 14 nA cm −2 , which corresponds to a sensitivity of 30.8 μC Gy −1 cm −2 , under the exposure of 6-MV hard X-rays generated by a medical linear accelerator. The angular dependence of the HXD has been studied, which offers a maximum variation of 26% in the posterior versus lateral beam directions. The flexible HXD can be conformed to the human body shape and is expected to eliminate variations due to source-to-skin distance with reduced physical evaluation complexities

Effects of process variations on the current in Schottky Barrier Source-Gated Transistors

The sensitivity of the drain current in Schottky barrier source-gated transistors to process variation is studied using computer simulations. It is shown that provided the device is designed correctly, the current is independent of source-drain separation and is insensitive to source length variations. However, uniform insulator thickness and precise control of the source barrier is needed if good current uniformity is to be obtained

Sequential and resonant field emission from nano-structured cathodes

The attempt to integrate two electron transport mechanisms, by computing the field emission (FE) current as a superposition of both resonant and sequential branches, is reported. A quantum object through which the tunnelling occurs is modelled as a one-dimensional (1D) potential well separated from the substrate by a potential barrier. Results show that the proposed model is useful in the interpretation of real I-V diagrams of FE through composite vacuum interfaces and in evaluating the amount of coherence in the related tunnelling processes