Zoom Out and See Better: Scalable Message Tracing for Post-Silicon SoC Debug

We present a method for selecting trace messages for post-silicon validation of System-on-Chip (SoC). Our message selection is guided by specifications of interacting flows in common user applications. In current practice, such messages are selected based on designer expertise. We formulate the problem as an optimization of mutual information gain and trace buffer utilization. Our approach scales to systems far beyond the capacity of current signal selection techniques. We achieve an average trace buffer utilization of 98.96% with an average flow specification coverage of 94.3% and an average bug localization to only 21.11% of the potential root causes in our large-scale debugging effort. We present efficacy of our selected messages in debugging and root cause analysis using five realistic case studies consisting of complex and subtle bugs from the OpenSPARC T2 processor.IBMOpe

Automatic Generation of High Coverage Transient Fault Detectors Using GoldMine

Coordinated Science Laboratory was formerly known as Control Systems LaboratoryNational Science Foundatio

Efficient Model Checking of Hardware Using Conditioned Slicing

AbstractIn this work, we present an abstraction based property verification technique for hardware using conditioned slicing. We handle safety property specifications of the form G(antecedent⇒consequent). We use the antecedent of the properties to create our abstractions, Antecedent Conditioned Slices. We extend conditioned slicing to Hardware Description Languages (HDLs). We provide a theoretical foundation for our conditioned slicing based verification technique. We also present experimental results on the Verilog RTL implementation of the USB 2.0. We demonstrate very high performance gains achieved by our technique when compared to static program slicing, using state-of-the-art model checkers

Duplex: Simultaneous Parameter-Performance Exploration for Optimizing Analog Circuits

We present Duplex random tree search, an algorithm to optimize performance metrics of analog and mixed signal circuits. Duplex determines the optimal design, the Pareto set, and the sensitivity of a circuit’s performance metrics to its parameters. We demonstrate that Duplex is 5x faster than the state-of-the-art and finds the global optimum for a design whose previously published result was a local optimum. We show our algorithm’s scalability by optimizing a system-level post-layout charged-pump PLL circuit.National Science Foundation / NSF CCF 14-23431Ope

Statistical Guarantees of Performance for MIMO Designs

Coordinated Science Laboratory was formerly known as Control Systems LaboratoryUILU-ENG-09-221

SHARPE: Variation-Aware Formal Statistical Timing Analysis in RTL

Variations in timing can occur due to multiple sources on a chip. Many circuit level statistical techniques are used to analyze timing in the presence of these sources of variation. At the system (higher) level of design, however, timing estimation/verification is not performed. The design at the Register Transfer Level (RTL) is unaware of the underlying statistics and timing variations. It is desirable to have ``variation awareness'' at the higher level, and estimate block level delay distributions early in the design cycle, to evaluate design choices quickly and minimize post-synthesis simulation costs. In this paper, we introduce SHARPE, a rigorous, systematic timing analysis/verification methodology and tool flow to find statistical delay invariants in RTL. We treat the RTL source code as a program and use static program analysis techniques to compute probabilities. We model the probabilistic RTL modules as Discrete Time Markov Chains (DTMCs) that are then checked formally for probabilistic invariants using PRISM, a probabilistic model checker. Our technique is illustrated on the RTL description of the datapath of OR1200, an open source embedded processor.Ope

Evaluating Code Coverage of Assertions by Static Analysis of RTL

Coordinated Science Laboratory was formerly known as Control Systems LaboratoryAssertions are critical in pre-silicon hardware verification to ensure expected design behavior. While Register Transfer Level (RTL) code coverage can provide a metric for assertion quality, few methods to report it currently exist. We introduce two practical and effective code coverage metrics for assertions - one inspired by test suite code coverage as reported by RTL simulators and the other by assertion correctness in the context of formal verification. We present an algorithm to compute coverage with respect to assertion correctness, by analyzing the Control Flow Graph (CFG) constructed from the RTL source code. Our technique reports coverage in terms of lines of RTL source code which is easier to interpret and can help in efficiently enhancing an assertion suite. We apply our technique to an open source USB 2.0 design and show that our coverage evaluation is efficient and scalable.Qualcomm Inc. / C5505 Qualcomm 90003867

Towards Coverage Closure: Using GoldMine Assertions for Generating Design Validation Stimulus

Coordinated Science Laboratory was formerly known as Control Systems Laborator

MicroRNA-Mediated mRNA Translation Activation in Quiescent Cells and Oocytes Involves Recruitment of a Nuclear microRNP

MicroRNAs can promote translation of specific mRNAs in quiescent (G0) mammalian cells and immature Xenopus laevis oocytes. We report that microRNA-mediated upregulation of target mRNAs in oocytes is dependent on nuclear entry of the microRNA; cytoplasmically-injected microRNA repress target mRNAs. Components of the activation microRNP, AGO, FXR1 (FXR1-iso-a) and miR16 are present in the nucleus and cytoplasm. Importantly, microRNA target mRNAs for upregulation, Myt1, TNFα and a reporter bearing the TNFα AU-rich, microRNA target sequence, are associated with AGO in immature oocyte nuclei and AGO2 in G0 human nuclei, respectively. mRNAs that are repressed or lack target sites are not associated with nuclear AGO. Crosslinking-coupled immunopurification revealed greater association of AGO2 with FXR1 in the nucleus compared to cytoplasm. Consistently, overexpression of FXR1-iso-a rescues activation of cytoplasmically-injected RNAs and in low density, proliferating cells. These data indicate the importance of a compartmentalized AGO2-FXR1-iso-a complex for selective recruitment for microRNA-mediated upregulation