Simulations of charge transfer in Electron Multiplying Charge Coupled Devices

Electron Multiplying Charge Coupled Devices (EMCCDs) are a variant of traditional CCD technology well suited to applications that demand high speed operation in low light conditions. On-chip signal amplification allows the sensor to effectively suppress the noise introduced by readout electronics, permitting sub-electron read noise at MHz pixel rates. The devices have been the subject of many detailed studies concerning their operation, however there has not been a study into the transfer and multiplication process within the EMCCD gain register. Such an investigation has the potential to explain certain observed performance characteristics, as well as inform further optimisations to their operation. In this study, the results from simulation of charge transfer within an EMCCD gain register element are discussed with a specific focus on the implications for serial charge transfer efficiency (CTE). The effects of operating voltage and readout speed are explored in context with typical operating conditions. It is shown that during transfer, a small portion of signal charge may become trapped at the semiconductor-insulator interface that could act to degrade the serial CTE in certain operating conditions

Influence of temperature and dimension in a 4H-SiC vertical power MOSFET

A study of the impact of dimension and temperature on a state of the art 4H-SiC power vertical DMOSFET has been carried out using drift-diffusion calculations in conjunction with electrical characterizations to extract physical parameters and doping profiles in a 6 μm channel length device. The model presented in this paper includes the effect of trapping in the channel/oxide interface. Using these parameters, the performance of corresponding lateral and vertical scaled devices are studied. Electrothermal simulations showing self-heating effects are also carried out. The results are qualitatively discussed with the help of an analytical physical model, which considers the interplay between the different device resistances. At low drain bias, the drain current is increased by 42.86% (ID = 5 A at VG = 20 V) when reducing the dimension vertically, whereas it is decreased by 28.57% (ID = 2.5 A at VG = 20 V) when reducing the dimension laterally. These effects are enhanced at high drain bias. In addition, the effect of dimension reduction for breakdown voltage, electric field and impact ionization is investigated. A substantial reduction in breakdown voltage was found when the vertical dimensions were decreased as compared to the lateral dimensions

Modelling charge storage in Euclid CCD structures

The primary aim of ESA's proposed Euclid mission is to observe the distribution of galaxies and galaxy clusters, enabling the mapping of the dark architecture of the universe [1]. This requires a high performance detector, designed to endure a harsh radiation environment. The e2v CCD204 image sensor was redesigned for use on the Euclid mission [2]. The resulting e2v CCD273 has a narrower serial register electrode and transfer channel compared to its predecessor, causing a reduction in the size of charge packets stored, thus reducing the number of traps encountered by the signal electrons during charge transfer and improving the serial Charge Transfer Efficiency (CTE) under irradiation [3]. The proposed Euclid CCD has been modelled using the Silvaco TCAD software [4], to test preliminary calculations for the Full Well Capacity (FWC) and the channel potential of the device and provide indications of the volume occupied by varying signals. These results are essential for the realisation of the mission objectives and for radiation damage studies, with the aim of producing empirically derived formulae to approximate signal-volume characteristics in the devices. These formulae will be used in the radiation damage (charge trapping) models. The Silvaco simulations have been tested against real devices to compare the experimental measurements to those predicted in the models. Using these results, the implications of this study on the Euclid mission can be investigated in more detail

Development of in-situ trap characterisation techniques for EMCCDs

The "trap pumping" technique has seen considerable use over recent years as a means to probe the intrinsic properties of silicon defects that can impact charge transfer performance within CCD-based technologies. While the theory behind the technique is reasonably well understood, it has to date only been applied to relatively simple pixel designs where the motion of charge between pixel phases is fairly easy to predict. For some devices, the intrinsic pixel architecture is more complex and can consist of unequal phase sizes and additional implants that deform the electronic potential. Here, we present the implementation of the trap pumping technique for the CCD201-20, a 2-phase Teledyne e2v EMCCD. Clocking schemes are presented that can provide the location of silicon defects to sub-micron resolution. Experimental techniques that allow determination of trap energy levels and emission cross sections are presented. These are then implemented on an irradiated CCD201-20 to determine the energy level and emission cross section for defects thought to be the double acceptor state of the silicon divacancy (VV--) and carbon-phosphorus (CiPs) pairs. An improvement in charge transfer performance through optimised parallel clock delay is demonstrated and found to correlate with the properties of defects found using the trap pumping technique

Development of in-situ trap characterisation techniques for EMCCDs

The "trap pumping" technique has seen considerable use over recent years as a means to probe the intrinsic properties of silicon defects that can impact charge transfer performance within CCD-based technologies. While the theory behind the technique is reasonably well understood, it has to date only been applied to relatively simple pixel designs where the motion of charge between pixel phases is fairly easy to predict. For some devices, the intrinsic pixel architecture is more complex and can consist of unequal phase sizes and additional implants that deform the electronic potential. Here, we present the implementation of the trap pumping technique for the CCD201-20, a 2-phase Teledyne e2v EMCCD. Clocking schemes are presented that can provide the location of silicon defects to sub-micron resolution. Experimental techniques that allow determination of trap energy levels and emission cross sections are presented. These are then implemented on an irradiated CCD201-20 to determine the energy level and emission cross section for defects thought to be the double acceptor state of the silicon divacancy (VV--) and carbon-phosphorus (CiPs) pairs. An improvement in charge transfer performance through optimised parallel clock delay is demonstrated and found to correlate with the properties of defects found using the trap pumping technique

P-Type Silicon Strip Sensors for the new CMS Tracker at HL-L-HC

Abstract: The upgrade of the LHC to the High-Luminosity LHC (HL-LHC) is expected to increase the LHC design luminosity by an order of magnitude. This will require silicon tracking detectors with a significantly higher radiation hardness. The CMS Tracker Collaboration has conducted an irradiation and measurement campaign to identify suitable silicon sensor materials and strip designs for the future outer tracker at the CMS experiment. Based on these results, the collaboration has chosen to use n-in-p type silicon sensors and focus further investigations on the optimization of that sensor type