25 research outputs found
Average drift mobility and apparent sheet-electron density profiles in strained-Si-SiGe buried-channel depletion-mode n-MOSFETs
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Average drift mobility and apparent sheet-electron density profiles in strained-Si-SiGe buried-channel depletion-mode n-MOSFETs
No full textIn this paper, we describe a simple method to extract the average drift mobility and the apparent sheet electron density versus the applied gate voltage and the vertical effective electric field in strained-Si-SiGe buried-channel depletion-mode metal-oxide semiconductor field-effect transistors (n-MOSFETs). For this, we adapted an established technique used in evaluating mobility profiles in Schottky-gate MESFETs, by taking into account the existence in our devices of the gate-oxide capacitance C and by introducing an effective junction capacitance C, which follows the ideal Schottky's depletion approximation. By applying our method on fabricated transistors we were able to obtain the average drift mobility profile versus the applied vertical effective field and monitor values as high as 618 cm/Vs. We also extracted the apparent sheet electron density profile with values reaching as high as 3.4 × 10 cm. Although the layer design had not been optimized, the results show mobility enhancement in the strained silicon channel and, to our view, point to a unique regime of operation for these devices, which should benefit the low-power and low-voltage applications. The proposed method could be used as a nondestructive tool for monitoring the transport properties in Si-SiGe modulation-doped MOSFETs. It could also serve as a useful platform for determining explicit modeling links between the layer design and the device performance. © 2004 IEEE
SiGe HMOSFET monolithic inverting current mirror
No full textThe authors present the first to their knowledge monolithic inverting current mirror fabricated on heterostructure Si/SiGe technology, using buried silicon channel depletion-mode MOSFET transistors. Characterisation results both at DC and at high frequencies prove that the technology is viable, with the circuit exhibiting remarkably high linearity while combining functionality usually achieved in III-V systems with the robustness and flexibility of a MOS platform. This emerging technology qualifies as an ideal candidate for the building of elemental analogue blocks, where tuning and exploitation of device properties will eliminate the need of further linearisation circuitry, which increases noise, complexity and power consumption. Furthermore, these circuits can also benefit from the high frequency bandwidth associated with strained silicon channels. © 2005 Elsevier Ltd. All rights reserved
SiGe HMODFET "KAIST" micropower model and amplifier realization
No full textThe recently published small-signal KAIST model is used successfully to fit the measured RF characteristics of a novel SiGe n-HMODFET device operating at micropower levels and extracted small-signal model parameters for this device under micropower operation are presented here for the first time. This model is then used to predict the performance of a simple micropower amplifier (sub 300-μW total power consumption), realized in SiGe technology, and a comparison of modeled versus measured data is included
