Contribution a l'etude, par spectroscopie de photoelectrons, d'interfaces polymere-metal : application au cas de l'acide polyamique et du polyimide

SIGLECNRS T Bordereau / INIST-CNRS - Institut de l'Information Scientifique et TechniqueFRFranc

DESIGN OF A 3 GHz 6TH ORDER DELTA-SIGMA MODULATOR IN A 0.2 μm GaAs TECHNOLOGY

International audienceThis paper presents the design of a monobit 6th order delta-sigma modulator in a GaAs 0.2 μm technology. The central frequency is 750 MHz and the sampling frequency is 3 GHz. The reached resolution is 10.5 bits over a 10 MHz bandwith. The modulator operates from ± 5 V power supplies and consumes 5.7 W. Each block of the modulator is presented at transistor level. Two drawbacks are pointed out: low pass terms of Gm-LC resonators and the lowpass characteristic of the adder. Two solutions are proposed. Finally, simulation results of the complete modulator are given

A 7-dB 43-GHz CMOS distributed amplifier on high-resistivity SOI substrates

This paper presents designs and measurements of distributed amplifiers (DAs) processed on a 130-nm silicon-on-insulator CMOS technology on either standard-resistivity (10 Omega . cm) or high-resistivity (>1 k Omega . cm) substrates, and with either body-contacted (BC) or floating-body (FB) MOSFETs. Investigations have been carried out to assess the impact of active device performance and transmission line losses on circuit design by means of simulations, analytical calculations, and comparisons of the small-signal equivalent-circuit parameters. On standard-resistivity substrates, DAs with FB devices and lossy microstrip lines on thin film exhibit a measured gain of 7.1 dB and a unity-gain bandwidth (UGB) of 27 GHz for a dc power consumption of 57 mW. With the introduction of high-resistivity substrates, other DAs, with the same architecture and using lower loss coplanar waveguide lines, show a UGB of 51 GHz with FB devices and 47 GHz with BC devices. To the authors' knowledge, the designs presented in this paper achieve the best tradeoffis in terms of gain, bandwidth, and power consumption for CMOS-based circuits With comparable architecture

Behavior of a common source traveling wave amplifier versus temperature in SOI technology

In this paper, the design and the results of a CMOS Silicon-on-Insulator (SOI) traveling wave amplifier (TWA) versus temperature are presented. The four stage TWA is designed with a single common source n-MOSFET in each stage using a 130 nm SOI CMOS technology requiring a chip area of 0.75 mm2 . A gain of 4.5 dB and a unitygain bandwidth of 30 GHz are measured at 1.4 V supply voltage for a power consumption of 66 mW. The designed circuit has been characterized over a temperature range from 25 to 300°C. The performance degradation on the gain of the TWA, the SOI transistors as well as the microstrip lines used for the matching network are analyzed. Index terms – SOI, Traveling Wave Amplifier, High temperature effect, Microstrip lines, DTMOS

An investigation of high temperature effects on CPW and MSL on SOI substrate for RF applications

One of the main markets for Silicon-onInsulator (SOI) devices is the high-temperature applications. In the last decade, the technology advances to deep submicron to improve device performances in term of cut-off frequency. Practical application of integrated circuits requires the consideration of a wide temperature range, and transmission lines are widely used in MMIC's as interconnects and matching networks. Therefore, there is a need to investigate the performances of the transmission line structures on SOI substrate in a wide temperature range, as a function of frequency. The behaviour of 50 Ω microstrip (MSL) and coplanar waveguide (CPW) transmission line topologies versus temperature is presented

Behaviour of TFMS and CPW line on SOI substrate versus high temperature for RF applications

Practical application of integrated circuits requires operation over a wide temperature range. In the case of microwave monolithic integrated circuits (MMICs), the quality of the interconnections as well as the passive matching networks in term of losses is predominent. Therefore, there is a need to investigate the performances of transmission line structures on Si-based substrates in a wide temperature range, as a function of frequency. The behaviour of 50 Ω thin film microstrip (TFMS) and coplanar waveguide (CPW) transmission line topologies on both standard and high resistivity silicon-on-insulator (SOI) substrates versus high temperature is presented

Behavior of a common source traveling wave amplifier versus temperature in SOI technology

In this paper, the design and the results of a CMOS Silicon-On-Insulator (SOI) traveling wave amplifier (TWA) versus temperature are presented. The four stage TWA is designed with a single common source n-MOSFET in each stage using a 130 nm SOI CMOS technology requiring a chip area of 0.75 mm/sup 2/. A gain of 4.5 dB and a unity-gain bandwidth of 30 GHz are measured at 1.4 V supply voltage with a measured power consumption of 66 mW. The designed circuit has been characterized over a temperature range from 25 to 300 degrees C. The performance degradation on the gain of the TWA, the SOI transistors as well as the microstrip lines used for the matching network are analyzed.Anglai

Behavior of a traveling-wave amplifier versus temperature in SOI technology

In this paper, the design and measurement results of a CMOS partially depleted silicon-on-insulator (SOI) traveling-wave amplifier (TWA) are presented. The four-stage TWA is designed with a single common source nMOSFET in each stage using a 130-nm SOI CMOS technology requiring a chip area of 0.75 mm2. A gain of 4.5 dB and a unity-gain bandwidth of 30 GHz are measured at 1.4-V supply voltage for a power consumption of 66 mW. The designed circuit has been characterized over a temperature range from 25 degC to 300 degC. The performance degradation on the gain of the TWA, the SOI transistors, as well as the microstrip lines used for the matching network are analyzed. Thanks to the introduction of a dynamic threshold-voltage MOSFET, a greater gain-bandwidth product under lower bias conditions is demonstrate

Temperature effect on the performance of a traveling wave amplifier in 130 nm SOI technology

The behavior of an integrated traveling wave amplifier (TWA), fabricated in a 130 nm silicon-on-insulator (SOI) CMOS process, has been characterized over a temperature range from 25 degrees C to 250 degrees C. The TWA is a four-stage cascode design which uses floating body (FB) transistors and microstrip lines as passives. A gain of 7 dB with a 0.4-27 GHz bandwidth is measured under 1.4 V supply voltage. The effects of high temperature are observed on the gain of the TWA, as well as on the SOI transistors and the microstrip lines.Anglai