mCrash: a framework for the evaluation of mobile devices trustworthiness properties

A rationale and framework for the evaluation of mobile devices’ robustness and trustworthiness properties using a Windows Mobile 5.0 testbed is presented. The methodology followed includes employing software faultinjection techniques at the operating system’s interface level and customising tests to the behaviour of the software

Work-in-progress on a thin IEEE1451.0 - architecture to implement reconfigurable Weblab infrastructures

Institutions have been creating their own specific weblab infrastructures. Usually, they use distinct software and hardware architectures comprehending instruments and modules (I&M) able to be parameterized but difficult to be shared. These aspects are impairing their widespread in education, since collaboration between institutions, in developing and sharing resources, is still low. To handle both aspects, this paper proposes the adoption of the IEEE1451.0 Std. with FPGA technology for creating reconfigurable weblab infrastructures. It is suggested the adoption of an IEEE1451.0 infrastructure with compatible instruments, described in Hardware Description Languages (HDL), to be reconfigured in FPGA-based boards. Besides an overview of the IEEE1451.0 Std., this paper presents a solution currently under development which seeks to enable the reconfiguration and the remote control of weblab infrastructures using a set of IEEE1451.0 HTTP commands

edu.LMC and other LMC simulation approaches: contributions to computer architecture education using the LMC paradigm

The LMC paradigm is not a recent approach to teaching computer architecture: it has been presented, tested and used since 1965, first by its authors, Madnick and Donovan, and their MIT students, and since then in many other universities around the world. The main purpose of the LMC paradigm is to explain, using a very simple model, the main components of a real computer system, and to learn how to program using a simple decimalencoded instruction set. Using new LMC simulators (based on the LMC paradigm) developed since then, students can nowadays take advantage of simulation processes (e.g., to simulate a program’s step-by-step execution). We evaluated six different LMC simulators, picked the “best practices” associated with each one, and developed a new simulator especially focused on management and informatics undergraduate student requirements. This new simulator, edu.LMC, has been tested in a computer architecture courseEducation for the 21 st century - impact of ICT and Digital Resources ConferenceRed de Universidades con Carreras en Informática (RedUNCI

Using dynamic analysis of Java bytecode for evolutionary object-oriented unit testing

The focus of this paper is on presenting a methodology for generating and optimizing test data by employing evolutionary search techniques, with basis on the information provided by the analysis and interpretation of Java bytecode and on the dynamic execution of the instrumented test object. The main reason to work at the bytecode level is that even when the source code is unavailable, structural testing requirements can still be derived and used to assess the quality of a given test set and to guide the evolutionary search towards reaching specific test goals. Java bytecode retains enough high-level information about the original source code for an underlying model for program representation to be built. The observations required to select or generate test data are obtained by employing dynamic analysis techniques – i.e. by instrumenting, tracing and analysing Java bytecode

eCrash: a framework for performing evolutionary testing on third-party Java components

The focus of this paper is on presenting a tool for generating test data by employing evolutionary search techniques, with basis on the information provided by the structural analysis and interpretation of the Java bytecode of third-party Java components, and on the dynamic execution of the instrumented test object. The main objective of this approach is that of evolving a set of test cases that yields full structural code coverage of the test object. Such a test set can be used for effectively performing the testing activity, providing confidence in the quality and robustness of the test object. The rationale of working at the bytecode level is that even when the source code is unavailable structural testing requirements can still be derived, and used to assess the quality of a test set and to guide the evolutionary search towards reaching specific test goals

FPGAs to create a reconfigurable IEEE1451.0-compliant weblab infrastructure

IX Jornadas sobre Sistemas Reconfiguráveis (REC’13)The reconfiguration capability provided by Field Programmable Gate Arrays (FPGA) and the current limitations of weblab infrastructures, opened a new research window. This paper focus on describing the way weblabs can be reconfigured with different Instruments & Modules (I&M) required to conduct remote experiments, without changing the entire infrastructure. For this purpose, the paper emphasizes the advantage of using FPGAs to create reconfigurable weblab infrastructures using the IEEE1451.0 Std. as a basis to develop, access and bind embedded I&Ms to an IEEE1451.0-Module.info:eu-repo/semantics/publishedVersio

Contextual Analysis of Remote Experimentation Using the Actor-Network Theory

Distance learning is promoting the adoption of several and new technological resources in education. The Internet is a proof of this trend, providing students with the ability of accessing better pedagogical contents from everywhere at anytime. This is usually supported by the so-called Virtual Learning Environments (VLEs). However, the increase of the bandwidth together with improvements in terms of the devices’ processing capabilities for accessing services/tools through the internet, has contributed to the appearance of the Remote Experimentation (RE) concept. Currently adopted by several Science and Engineering (S&E) courses, RE is classified as a sub-domain of E-learning and as an extension of the traditional VLEs, since it provides all the facilities required for remotely accessing laboratorial experiments, giving both students and teachers the ability to control real experiments by using a simple device (e.g. PC, PDA, smart phone, etc.) connected to the internet. Traditional (in-place) laboratorial experiments can now be remotely controlled with more flexibility, reducing place and time restrictions usually present in a real laboratory. In addition, technological evolution is contributing to many changes in several domains, which has alerted us to the importance of contextualizing RE as a network of interconnected actors, with distinct characteristics and interests. This represents a huge challenge that is fundamental to analyse, since society, and more particularly the educational context, is faced with several unpredictable influences from technological innovations that may contribute to the adoption of various educational solutions some of which may not have been validated, particularly in S&E courses. Hence, this paper focuses on an analysis of RE based on the Actor-Network Theory (ANT) in order to understand the existing relationships between human and non-human (technological and/or conceptual) actors. The paper begins by contextualizing RE as an actor-network in an intersection of several contexts, namely the social, technical and educational. Further on, we map the actors and their associations. An analysis of the inclusion of a new actor into the RE actor-network, namely FPGA-based boards for accommodating Instruments and Modules (I&M), which are usually applied in remote laboratory infrastructures, is dealt with in the final section of this paper.info:eu-repo/semantics/publishedVersio

An FPGA-embedded oscilloscope based on the IEEE1451.0 Std.

Digital oscilloscopes are adopted in several areas of knowledge, in particular in electrical engineering, since they are fundamental for measuring and classifying electrical signals. Thanks to the proliferation of Field Programmable Gate Arrays (FPGAs), embedded instruments are currently an alternative solution to stand-alone and modular instruments, traditionally available in the laboratories. High performance, low cost and the huge flexibility to change functional characteristics, make embedded instruments an emerging solution for conducting electrical experiments. This paper describes the project and the implementation of a digital oscilloscope embedded in a FPGA. In order to facilitate their control, an innovative architecture is defined according to the IEEE1451.0 Std., which is typically used to develop the denominated smart transducers.info:eu-repo/semantics/publishedVersio

Injecção de Falhas por Varrimento Periférico em Processadores

As técnicas de injecção de falhas mais utilizadas podem ser classificadas em técnicas de indução, técnicas de injecão por hardware e técnicas de injecção por software. Dentro das técnicas de injecção por hardware surgem as técnicas de injecção de falhas recorrendo à tecnologia de teste por varrimento periférico. Esta encontra-se fortemente implantada nos processadores mais recentes, fornecendo um método de acesso ao seu interior de forma a permitir operações de teste e depuração. A sua utilização para a injecção de falhas é um passo lógico e tem sido estudada desde os anos 90. Os trabalhos desenvolvidos nesta área são diversos e incluem soluções que não exigem qualquer alteração à infraestrutura normalizada e soluções que modificam as células e a infraestrutura de controlo de forma a suportarem esta funcionalidade. Estas alterações implicam atrasos temporais acrescidos e um aumento da área de silício destinada a funções de teste, tornando-se importante uma preocupação com a optimização para que a inclusão de capacidades de injecção de falhas não afecte significativamente o desempenho e o custo dos componentes onde são implementadas.info:eu-repo/semantics/publishedVersio