Topology optimization of multiple anisotropic materials, with application to self-assembling diblock copolymers

We propose a solution strategy for a multimaterial minimum compliance topology optimization problem, which consists in finding the optimal allocation of a finite number of candidate (possibly anisotropic) materials inside a reference domain, with the aim of maximizing the stiffness of the body. As a relevant and novel application we consider the optimization of self-assembled structures obtained by means of diblock copolymers. Such polymers are a class of self-assembling materials which spontaneously synthesize periodic microstructures at the nanoscale, whose anisotropic features can be exploited to build structures with optimal elastic response, resembling biological tissues exhibiting microstructures, such as bones and wood. For this purpose we present a new generalization of the classical Optimality Criteria algorithm to encompass a wider class of problems, where multiple candidate materials are considered, the orientation of the anisotropic materials is optimized, and the elastic properties of the materials are assumed to depend on a scalar parameter, which is optimized simultaneously to the material allocation and orientation. Well-posedness of the optimization problem and well-definition of the presented algorithm are narrowly treated and proved. The capabilities of the proposed method are assessed through several numerical tests

Trojans in Early Design Steps—An Emerging Threat

Hardware Trojans inserted by malicious foundries during integrated circuit manufacturing have received substantial attention in recent years. In this paper, we focus on a different type of hardware Trojan threats: attacks in the early steps of design process. We show that third-party intellectual property cores and CAD tools constitute realistic attack surfaces and that even system specification can be targeted by adversaries. We discuss the devastating damage potential of such attacks, the applicable countermeasures against them and their deficiencies

Exploring Energy Efficiency of Lightweight Block Ciphers

Abstract. In the last few years, the field of lightweight cryptography has seen an influx in the number of block ciphers and hash functions being proposed. One of the metrics that define a good lightweight design is the energy consumed per unit operation of the algorithm. For block ciphers, this operation is the encryption of one plaintext. By studying the energy consumption model of a CMOS gate, we arrive at the conclusion that the total energy consumed during the encryption operation of an r-round unrolled architecture of any block cipher is a quadratic function in r. We then apply our model to 9 well known lightweight block ciphers, and thereby try to predict the optimal value of r at which an r-round unrolled architecture for a cipher is likely to be most energy efficient. We also try to relate our results to some physical design parameters like the signal delay across a round and algorithmic parameters like the number of rounds taken to achieve full diffusion of a difference in the plaintext/key

An oscillation-free fully staggered algorithm for velocity-dependent active models of cardiac mechanics

In this paper we address an unresolved problem in the numerical modeling of cardiac electromechanics, that is the onset of numerical oscillations due to the dependence of force generation models on the fibers shortening velocity. A way to avoid numerical oscillations is to use monolithic schemes for the solution of the coupled problem of active-passive mechanics. However, staggered strategies, which foresee the sequential solution of the models of force generation and of tissue mechanics, are preferable, due to their reduced computational cost and low implementation effort. In this paper we propose a cure for this issue, by introducing, with respect to the standard staggered scheme, a numerically consistent stabilization term. This term is derived in virtue of the identification of the cause of instability in the mismatch between macroscopic and microscopic strains, inconsistently expressed in Lagrangian and Eulerian coordinates, respectively. By considering a model problem of active mechanics we prove that the proposed scheme is unconditionally absolutely stable (i.e. it is stable for any time step size), yet within a fully staggered framework. As such, the new scheme removes the non-physical oscillations, as we prove by applying it to three force generation models, namely the Niederer-Hunter-Smith model, the model by Land and coworkers, and the mean-field force generation model that we have recently proposed. (C) 2020 The Author(s). Published by Elsevier B.V

Preserving the positivity of the deformation gradient determinant in intergrid interpolation by combining RBFs and SVD: application to cardiac electromechanics

The accurate robust and efficient transfer of the deformation gradient tensor between meshes of different resolution is crucial in cardiac electromechanics simulations. We present a novel method that combines rescaled localized Radial Basis Function (RBF) interpolation with Singular Value Decomposition (SVD) to preserve the positivity of the determinant of the deformation gradient tensor. The method involves decomposing the evaluations of the tensor at the quadrature nodes of the source mesh into rotation matrices and diagonal matrices of singular values; computing the RBF interpolation of the quaternion representation of rotation matrices and the singular value logarithms; reassembling the deformation gradient tensors at quadrature nodes of the destination mesh, to be used in the assembly of the electrophysiology model equations. The proposed method overcomes limitations of existing interpolation methods, including nested intergrid interpolation and RBF interpolation of the displacement field, that may lead to the loss of physical meaningfulness of the mathematical formulation and then to solver failures at the algebraic level, due to negative determinant values. The proposed method enables the transfer of solution variables between finite element spaces of different degrees and shapes and without stringent conformity requirements between different meshes, enhancing the flexibility and accuracy of electromechanical simulations. Numerical results confirm that the proposed method enables the transfer of the deformation gradient tensor, allowing to successfully run simulations in cases where existing methods fail. This work provides an efficient and robust method for the intergrid transfer of the deformation gradient tensor, enabling independent tailoring of mesh discretizations to the particular characteristics of the physical components concurring to the of the multiphysics model.Comment: 24 pages; 11 figure

Compact Circuits for Efficient Mobius Transform

Möbius transform is a linear circuit used to compute the evaluations of a Boolean function over all points on its input domain. The operation is very useful in finding the solution of a system of polynomial equations over GF (2) for obvious reasons. However the operation, although linear, needs exponential number of logic operations (around $n\cdot 2^{n-1}$ bit xors) for an $n$-variable Boolean function. As such the only known hardware circuit to efficiently compute the Möbius Transform requires silicon area that is exponential in $n$. For Boolean functions whose algebraic degree is bound by some parameter $d$, recursive definitions of the Möbius Transform exist that requires only $O(n^{d+1})$ space in software. However converting the mathematical definition of this space-efficient algorithm into a hardware architecture is a non-trivial task, primarily because the recursion calls notionally lead to a depth-first search in a transition graph that require context switches at each recursion call for which straightforward mapping in hardware is difficult. In this paper we look to overcome these very challenges in an engineering sense. We propose a space efficient sequential hardware circuit for the Möbius Transform that requires only polynomial circuit area (i.e. $O(n^{d+1})$) provided the algebraic degree of the Boolean function is limited to $d$. We show that how this circuit can be used as a component to efficiently solve polynomial equations of degree at most $d$ by using fast exhaustive search. We propose three different circuit architectures for this, each of which used the Möbius Transform circuit as a core component. We show that asymptotically, all the solutions of a system of $m$ polynomials in $n$ unknowns and algebraic degree $d$ over GF (2) can be found using a circuit of silicon area proportional to $m \cdot n^{d+1}$ and physical time proportional to $2\cdot\log_2(n-d)\cdot 2^{n-d}$

Compact Circuits for Efficient Möbius Transform

The Möbius transform is a linear circuit used to compute the evaluations of a Boolean function over all points on its input domain. The operation is very useful in finding the solution of a system of polynomial equations over GF(2) for obvious reasons. However the operation, although linear, needs exponential number of logic operations (around n · 2n−1 bit xors) for an n-variable Boolean function. As such, the only known hardware circuit to efficiently compute the Möbius Transform requires silicon area that is exponential in n. For Boolean functions whose algebraic degree is bound by some parameter d, recursive definitions of the Möbius Transform exist that requires only O(nd+1) space in software. However converting the mathematical definition of this space-efficient algorithm into a hardware architecture is a non-trivial task, primarily because the recursion calls notionally lead to a depth-first search in a transition graph that requires context switches at each recursion call for which straightforward mapping to hardware is difficult. In this paper we look to overcome these very challenges in an engineering sense. We propose a space efficient sequential hardware circuit for the Möbius Transform that requires only polynomial circuit area (i.e. O(nd+1)) provided the algebraic degree of the Boolean function is limited to d. We show how this circuit can be used as a component to efficiently solve polynomial equations of degree at most d by using fast exhaustive search. We propose three different circuit architectures for this, each of which uses the Möbius Transform circuit as a core component. We show that asymptotically, all the solutions of a system of m polynomials in n unknowns and algebraic degree d over GF(2) can be found using a circuit of silicon area proportional to m · nd+1 and circuit depth proportional to 2 · log2(n − d). In the second part of the paper we introduce a fourth hardware solver that additionally aims to achieve energy efficiency. The main idea is to reduce the solution space to a small enough value by parallel application of Möbius Transform circuits over the first few equations of the system. This is done so that one can check individually whether the vectors of this reduced solution space satisfy each of the remaining equations of the system using lower power consumption. The new circuit has area also bound by m · nd+1 and has circuit depth proportional to d · log2 n. We also show that further optimizations with respect to energy consumption may be obtained by using depth-bound Möbius circuits that exponentially decrease run time at the cost of additional logic area and depth