Relationship between health-related quality of life and respiratory health status among coal-based sponge iron plant workers in Barjora, India

Background: Many coal-based sponge iron plant workers have poor health-related quality of life in general, and specifically a poor respiratory health status. However, the relationship between their health-related quality of life and respiratory health status is unknown. Aim: This study investigated the relationship between health related quality of life, measured using the EuroQol- 5D (EQ5D), and respiratory health status, measured using the St. George’s Respiratory Questionnaire (SGRQ), among coal-based sponge iron plant workers in Barjora, India. Method: A cross-sectional study was conducted among coalbased sponge iron plant workers in Barjora, and complete data were available on 252 participants. Spearman’s rank correlation coefficients were reported to show the strength of relationship between health-related quality of life and respiratory health status. Results and conclusion: Significant correlations were found between all EQ5D dimensions/visual analogue scale (VAS) and all SGRQ scores except between EQ5D-VAS and SGRQ-activity. A range of correlations was found. They were moderate between EQ5D-anxiety/depression and SGRQ-symptom, EQ5D-VAS and SGRQ-symptom, and EQ5D-anxiety/depression and SGRQ-total, but weak between all the other factors

Hardware speech recognition for user interfaces in low cost, low power devices

We propose a system architecture for real-time hardware speech recognition on low-cost, power-constrained devices. The system is intended to support real-time speech-based user interfaces as part of an effort to bring Information and Communication Technologies (ICTs) to underdeveloped regions of the world. Our system architecture exploits a shared infrastructure model. The computationally intensive task of speech model training and retraining is performed offline by shared servers, while the actual recognition of speech is conducted on low-cost hand-held devices using custom hardware. The recognizer is extremely flexible and can support multiple languages or dialects with speaker-independent recognition.Dynamic loading of speech models is used for changing language grammar and retraining, while reprogramming is used to support evolution of recognition algorithms. The focus on small sets of words (at one time) reduces the complexity, cost and power consumption. We design the speech decoder, the central component of the recognizer, and we validate it via a prototype FPGA implementation. We then use ASIC synthesis to estimate power and size for the design. Our evaluations demonstrate an order of magnitude improvement in power compared with optimized recognition software running on a low-power embedded general-purpose processor of the same technology and of similar capabilities. The synthesis also estimates the area of the design to be about 2.5mm 2, showing potential for lower cost. In designing and testing our recognizer we use datasets in both English and Tamil languages

Hardware speech recognition for user interfaces in low cost, low power devices

We propose a system architecture for real-time hardware speech recognition on low-cost, power-constrained devices. The system is intended to support real-time speech-based user interfaces as part of an eort to bring Information and Communication Technologies (ICTs) to underdeveloped regions of the world. Our system architecture exploits a shared infrastructure model. The computationally intensive task of speech model training and retraining is performed oine by shared servers, while the actual recognition of speech is conducted on low-cost hand-held devices using custom hardware. The recognizer is extremely exible and can support mul-tiple languages or dialects with speaker-independent recogni-tion.Dynamic loading of speech models is used for changing language grammar and retraining, while reprogramming is used to support evolution of recognition algorithms. The focus on small sets of words (at one time) reduces the complexity, cost and power consumption. We design the speech decoder, the central component of the recognizer, and we validate it via a prototype FPGA implementation. We then use ASIC synthesis to estimate power and size for the design. Our evaluations demonstrate an order of magnitude improve-ment in power compared with optimized recognition software running on a low-power embedded general-purpose processor of the same technology and of similar capabilities. The synthesis also estimates the area of the design to be about 2.5mm2, show-ing potential for lower cost. In designing and testing our recog-nizer we use datasets in both English and Tamil languages

Hardware speech recognition for user interfaces in low cost, low power devices

The FCC\u27s performance under Chairman Mark Fowler (1981-87) calls for a mixed verdict, in the author\u27s estimate. Fowler\u27s reliance on competition, the marketplace, and deregulation, fit the common carrier area, but ill served the present public interest standard of the Communications Act in the broadcast field. This article assesses FCC activities in this period in the above two fields, and also in the cable television and spectrum areas

The case for technology in developing regions

The United Nations' Millennium Development Goals, established in 2000, include the following: "Make available the benefits of new technologies-especially information and communications technologies." A majority of technology's benefits have been concentrated in industrialized nations and therefore limited to a fraction of the world's population. The authors believe that technology has a large role to play in developing regions, that "First World" technology to date has been a poor fit in these areas, and that developing regions thus need technology research. Despite the relative infancy of technology studies in developing regions, anecdotal evidence suggests that having access to technology has a beneficial economic impact

The case for technology in developing regions

The United Nations' Millennium Development Goals, established in 2000, include the following: "Make available the benefits of new technologies-especially information and communications technologies." A majority of technology's benefits have been concentrated in industrialized nations and therefore limited to a fraction of the world's population. The authors believe that technology has a large role to play in developing regions, that "First World" technology to date has been a poor fit in these areas, and that developing regions thus need technology research. Despite the relative infancy of technology studies in developing regions, anecdotal evidence suggests that having access to technology has a beneficial economic impact

Cryptanalysis of Secure Message Transmission Protocols with Feedback

In the context of secure point-to-point message transmission in networks with minimal connectivity, previous studies showed that feedbacks from the receiver to the sender can be used to reduce the requirements of network connectivity. We observe that the way how feedbacks were used in previous work does not guarantee perfect privacy to the transmitted message, when the adversary performs a Guessing Attack. In this paper, we shall describe our new Guessing Attack to some existing protocols (in fact, we are the first to point out a flaw in the protocols of Desmedt-Wang's Eurocrypt'02 paper and of Patra-Shankar-Choudhary-Srinathan-Rangan's CANS'07 paper), and propose a scheme defending against a general adversary structure. In addition, we also show how to achieve almost perfectly secure message transmission with feedbacks when perfect reliability or perfect privacy is not strictly required

Efficient Asynchronous Verifiable Secret Sharing and Multiparty Computation

Secure Multi-Party Computation (MPC) providing information theoretic security allows a set of n parties to securely compute an agreed function F over a finite field ${\mathbb F}$, even if t parties are under the control of a computationally unbounded active adversary. Asynchronous MPC (AMPC) is an important variant of MPC, which works over an asynchronous network. It is well known that perfect AMPC is possible if and only if n \geq 4t+1, while statistical AMPC is possible if and only if n \geq 3t+1. In this paper, we study the communication complexity of AMPC protocols (both statistical and perfect) designed with exactly n = 4t+1 parties. Our major contributions in this paper are as follows: 1. Asynchronous Verifiable Secret Sharing (AVSS) is one of the main building blocks for AMPC. In this paper, we design two AVSS protocols with 4t+1 parties: the first one is statistically secure and has non-optimal resilience, while the second one is perfectly secure and has optimal resilience. Both these schemes achieve a common interesting property, which was not achieved by the previous schemes. Specifically, our AVSS schemes allow to share a secret through a polynomial of degree at most d, where t \leq d \leq 2t. In contrast, the existing AVSS schemes can share a secret only through a polynomial of degree at most t. The new property of our AVSS simplifies the degree reduction step for the evaluation of multiplication gates in an AMPC protocol. 2.Using our statistical AVSS, we design a statistical AMPC protocol with n = 4t+1 which communicates O(n^2) field elements per multiplication gate. Though this protocol has non-optimal resilience, it significantly improves the communication complexity of the existing statistical AMPC protocols. 3. We then present a perfect AMPC protocol with n = 4t+1 (using our perfect AVSS scheme), which also communicates O(n^2) field elements per multiplication gate. This protocol improves on our statistical AMPC protocol as it has optimal resilience. To the best of our knowledge, this is the most communication efficient perfect AMPC protocol in the information theoretic setting