1,631 research outputs found

    Power conversion architecture for grid interface at high switching frequency

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    This paper presents a new power conversion architecture for single-phase grid interface. The proposed architecture is suitable for realizing miniaturized ac-dc converters operating at high frequencies (HF, above 3 MHz) and high power factor, without the need for electrolytic capacitors. It comprises of a line-frequency rectifier, a stack of capacitors, a set of regulating converters, and a power combining converter (or set of power combining converters). The regulating converters have inputs connected to capacitors on the capacitor stack, and provide regulated outputs while also achieving high power factor, with twice-line-frequency energy buffered on the capacitor stack. The power combining converter combines power from the individual regulated outputs to a single output, and may also provide isolation. While this architecture can be utilized with a variety of circuit topologies, it is especially suited for systems operating at HF (above 3 MHz), and we introduce circuit implementations that enable efficient operation in this range. The proposed approach is demonstrated for an LED driver operating from 120 V[subscript ac], and supplying a 35 V, 30 W output. The prototype converter operates at a (variable) switching frequency of 5-10 MHz and an efficiency of > 93%. The converter achieves a displacement power density of 130 W/in[superscript 3], while providing a 0.89 power factor, without the use of electrolytic capacitors

    Design Methodology for a Very High Frequency Resonant Boost Converter

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    This paper introduces a design methodology for a resonant boost converter topology that is suitable for operation at very high frequencies. The topology we examine features a low parts count and fast transient response, but suffers from higher device stresses compared to other topologies that use a larger number of passive components. A numerical design procedure is developed for this topology that does not rely on time-domain simulation sweeps across parameters. This allows the optimal converter design to be found for a particular main semiconductor switch. If an integrated power process is used where the designer has control over layout of the semiconductor switch, the optimal combination of converter design and semiconductor layout can be found. To validate the proposed converter topology and design approach, a 75-MHz prototype converter is designed and experimentally demonstrated. The performance of the prototype closely matches that predicted by the design procedure, and the converter achieves good efficiency over a wide input voltage range

    Transmission Line Resistance Compression Networks and Applications to Wireless Power Transfer

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    Microwave-to-dc rectification is valuable in many applications, including RF energy recovery, dc-dc conversion, and wireless power transfer. In such applications, it is desired for the microwave rectifier system to provide a constant RF input impedance. Consequently, variation in rectifier input impedance over varying incident power levels can hurt system performance. To address this challenge, we introduce multiway transmission line resistance compression networks (TLRCNs) for maintaining near-constant input impedance in RF-to-dc rectifier systems. A development of TLRCNs is presented, along with their application to RF-to-dc conversion and wireless power transfer. We derive analytical expressions for the behavior of TLRCNs, and describe two design methodologies applicable to both single and multistage implementations. A 2.45-GHz four-way TLRCN network is implemented and applied to create a 4-W resistance compressed rectifier system that has narrow-range resistive input characteristics over a 10-dB power range. It is demonstrated to improve the impedance match to mostly resistive but variable input impedance class-E rectifiers over a 10-dB power range. The resulting TLRCN plus rectifier system has >50% RF-to-dc conversion efficiency over a >10-dB input power range at 2.45 GHz (peak efficiency 70%), and standing wave ratio <;1.1 over a 7.7-dB range, despite a nonnegligible reactive component in the rectifier loads

    Two-stage power conversion architecture for an LED driver circuit

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    This paper presents a merged-two-stage circuit topology suitable for efficient LED drivers operating from either wide-range dc input voltage or ac line voltage. This two-stage topology is based on a soft-charged switched-capacitor pre-regulator/transformation stage and a high-frequency magnetic regulator stage. Soft charging of the switched capacitor circuit, zero voltage switching of the high-frequency regulator circuit, and time-based indirect scale current control are used to maintain high efficiency, high power density, and high power factor. Two implementations of the proposed architecture are demonstrated: a wide input voltage range dc-dc converter and a line interfaced ac-dc converter. The dc-dc converter shows 85–95% efficiency at 20 W power across 25–200 V input voltage range, and the ac-dc converter achieves 88% efficiency with 0.93 power factor at 8.4 W average power

    Le syntagme intonatif en langage spontané : étude préliminaire

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    Une étude portant sur le syntagme intonatif (SI) en langage spontané menée à partir d’un corpus de français du Québec révèle des valeurs relativement stables quant à la longueur de ces SI exprimée en termes d’unités prosodiques minimales. La variabilité rencontrée ne peut être exprimée à l’aide de paramètres sociaux.A study of intonational phrasing (IP) in a corpus of spontaneous speech of Quebec French reveals relatively stable values of length of IPs when expressed in terms of minimal prosodic units. Variability in IP length is not statistically related to the social characteristics of the speakers

    Improving age-based fish stock assessments, with an application to American Plaice on the Grand Bank of Newfoundland

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    Age-based fish stock assessment models use available data to provide fisheries managers with estimates of population processes and to determine sustainable harvest rates. However, the data to inform these models is often complex and ignoring or oversimplifying these complexities can result in unsustainable or sub-optimal harvesting advice. This thesis improves age-based stock assessment models by accounting for important variability in the data. I first simulation tested nine methods that aim to account for the commonly used length-stratified age sampling design when estimating growth parameters. My results showed that commonly used methods had poor accuracy and the empirical proportion approach was optimal. Secondly, I developed a state-space stock assessment model for American plaice that allowed for errors in the underlying population processes and provided improvements in the retrospective plots. This research improved our understanding of American plaice population dynamics and growth and is a step forward in fitting more realistic integrated age-based stock assessment models

    Impedance Control Network Resonant dc-dc Converter for Wide-Range High-Efficiency Operation

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    This paper introduces a new resonant converter architecture that utilizes multiple inverters and a lossless impedance control network (ICN) to maintain zero voltage switching (ZVS) and near zero current switching (ZCS) across wide operating ranges. Hence, the ICN converter is able to operate at fixed frequency and maintain high efficiency across wide ranges in input and output voltages and output power. The ICN converter architecture enables increase in switching frequency (hence reducing size and mass) while achieving very high efficiency. Three prototype 200 W, 500 kHz ICN resonant converters, one with low-Q, one with medium-Q and one with high-Q resonant tanks, designed to operate over an input voltage range of 25 V to 40 V and an output voltage range of 250 V to 400 V are built and tested. The low-Q prototype ICN converter achieves a peak efficiency of 97.1%, maintains greater than 96.4% full power efficiency at 250 V output voltage across the nearly 2:1 input voltage range, and maintains full power efficiency above 95% across its full input and output voltage range. It also maintains efficiency above 94.6% over a 10:1 output power range across its full input and output voltage range owing to the use of burst-mode control.National Science Foundation (U.S.) (Award 1307699

    Two-Stage Power Conversion Architecture Suitable for Wide Range Input Voltage

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    This paper presents a merged-two-stage circuit topology suitable for either wide-range dc input voltage or ac line voltage at low-to-moderate power levels (e.g., up to 30 W). This two-stage topology is based on a soft-charged switched-capacitor preregulator/transformation stage and a high-frequency magnetic regulator stage. Soft charging of the switched capacitor circuit, zero voltage switching of the high-frequency regulator circuit, and time-based indirect current control are used to maintain high efficiency, high power density, and high power factor. The proposed architecture is applied to an LED driver circuit, and two implementations are demonstrated: a wide input voltage range dc-dc converter and a line interfaced ac-dc converter. The dc-dc converter shows 88%-96% efficiency at 30-W power across 25-200-V input voltage range, and the ac-dc converter achieves 88% efficiency with 0.93 power factor at 8.4-W average power. Contributions of this paper include: 1) demonstrating the value of a merged two-stage architecture to provide substantial design benefits in high-input voltage, low-power step down conversion applications, including both wide-range-input dc-dc and line-input ac-dc systems; 2) introduction of a multimode soft-charged SC stage for the merged architecture that enables compression of an 8:1 input voltage range into a 2:1 intermediate range, along with its implementation, loss considerations, and driving methods; and 3) merging of this topology with an resonant transition discontinuous-mode inverted buck stage and pseudocurrent control to enable step-down power conversion (e.g., for LED lighting) operating at greatly increased frequencies and reduced magnetics size than with more conventional approaches

    Miniaturized Low-Voltage Power Converters With Fast Dynamic Response

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    This paper demonstrates a two-stage approach for power conversion that combines the strengths of variable-topology switched capacitor techniques (small size and light-load performance) with the regulation capability of magnetic switch-mode power converters. The proposed approach takes advantage of the characteristics of complementary metal-oxide-semiconductor (CMOS) processes, and the resulting designs provide excellent efficiency and power density for low-voltage power conversion. These power converters can provide low-voltage outputs over a wide input voltage range with very fast dynamic response. Both design and fabrication considerations for highly integrated CMOS power converters using this architecture are addressed. The results are demonstrated in a 2.4-W dc-dc converter implemented in a 180-nm CMOS IC process and co-packaged with its passive components for high performance. The power converter operates from an input voltage of 2.7-5.5 V with an output voltage of ≤1.2 V, and achieves a 2210 W/in[superscript 3] power density with ≥80% efficiency.Focus Center Research ProgramUnited States. Defense Advanced Research Projects AgencySemiconductor Research CorporationCharles Stark Draper Laborator

    Thin-film composite forward osmosis membranes functionalized with graphene oxide–silver nanocomposites for biofouling control

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    © 2016 Elsevier B.V. Innovative approaches to prevent bacterial attachment and biofilm growth on membranes are critically needed to avoid decreasing membrane performance due to biofouling. In this study, we propose the fabrication of anti-biofouling thin-film composite membranes functionalized with graphene oxide–silver nanocomposites. In our membrane modification strategy, carboxyl groups on the graphene oxide–silver nanosheets are covalently bonded to carboxyl groups on the surface of thin-film composite membranes via a crosslinking reaction. Further characterization, such as scanning electron microscopy and Raman spectroscopy, revealed the immobilization of graphene oxide–silver nanocomposites on the membrane surface. Graphene oxide–silver modified membranes exhibited an 80% inactivation rate against attached Pseudomonas aeruginosa cells. In addition to a static antimicrobial assay, our study also provided insights on the anti-biofouling property of forward osmosis membranes during dynamic operation in a cross-flow test cell. Functionalization with graphene oxide–silver nanocomposites resulted in a promising anti-biofouling property without sacrificing the membrane intrinsic transport properties. Our results demonstrated that the use of graphene oxide–silver nanocomposites is a feasible and attractive approach for the development of anti-biofouling thin-film composite membranes
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