Very low thermal drift precision virtual voltage reference

A digital-based, process-supply-and-temperature independent voltage reference suitable to nanoscale CMOS technologies, which exploits the recently proposed ‘virtual reference’ concept to achieve a very low thermal drift, is presented. Its performance is assessed on the basis of simulations and experiments carried out on a microcontroller-based, proof-of-concept prototype and is compared with state-of-the-art integrated analogue and digital voltage references. A simulated (measured) thermal drift as low as 1 ppm/°C (5 ppm/°C) in the temperature range −40/+140°C (−10/+100°C) is reported

Analog processing by digital gates: fully synthesizable IC design for IoT interfaces

Analog integrated circuits do not take advantage of scaling and are easily the bottleneck in terms of cost and performance in Internet of Things (IoT) sensor nodes integrated in nanoscale technologies. While this challenge is most commonly addressed by devising more “digital friendly” analog cells based on traditional design concepts, the possibility to translate analog functions into digital, so that to implement them by true digital gates, is now emerging as a promising alternative. This last approach, which challenges the idea that “analog circuits will be always needed”, is presented in this tutorial starting from the theoretical background to its application in digital-based operational amplifiers, voltage references, oscillators and data converters integrated on silicon which have proposed in recent literature. The applicability of the concepts to the design of ICs which are natively portable across technology nodes and highly reconfigurable, thus enabling dynamic energy quality scaling, as well as a low design effort and a fast time-to-market will be described

Digital Suppression of EMI-Induced Errors in a Baseband Acquisition Front-End including Off-the-Shelf, EMI-Sensitive Operational Amplifiers

In this paper, the susceptibility to Electromagnetic Interference (EMI) of an analog signal acquisition front-end (AFE) due to EMI distortion in opamp-based pre-conditioning amplifiers is addressed. More specifically, the possibility to correct EMI-induced errors in the digital domain by post-processing the acquired digital waveforms is discussed and experimentally demonstrated for the first time with reference to an AFE based on EMI-sensitive, off-the-shelf operational amplifiers mounted on a specific EMI test PCB. Extensive experimental characterization in the presence of continuous wave and amplitude modulated EMI reveals the superior immunity to EMI of the proposed AFE and the robustness of the approach

All-Digital High Resolution D/A Conversion by Dyadic Digital Pulse Modulation

In this paper, the limitations of digital-to-analog (D/A) conversion by Digital Pulse Width Modulation (DPWM) are addressed and the novel Dyadic Digital Pulse Modulation (DDPM) technique for all-digital, low cost, high resolution, Nyquist-rate D/A conversion is proposed. Thanks to the spectral characteristics of the new modulation, in particular, the requirements of the filter needed to extract the baseband component of DPWM signals can be significantly released so that to be suitable to inexpensive integration on silicon in analog interfaces for nanoscale integrated systems. After the new DDPM technique and its properties are introduced on a theoretical basis, the implementation of a D/A converter (DAC) based on the proposed modulation is addressed and its performance in terms of noise and linearity is discussed. A 16-bit DDPM-DAC prototype is finally synthesized on a field-programmable gate array (FPGA) and experimentally characterized

Interference of Periodic and Spread-Spectrum-Modulated Waveforms with Analog and Digital Communications

In this article, the effectiveness and the limitations of spread-spectrum (SS) modulation techniques employed in switching-mode power converters and in digital systems to mitigate interference with communication equipment are analyzed and discussed under the EMC standard perspective and under an information theoretical perspective, with reference to different real-world scenarios. Substantial difference between potential EMI issues in traditional analog radio/TV broadcasting, digital data lines, and digital links featuring advanced channel coding techniques, e.g. in emerging power line communication (PLC) systems, are highlighted. Practical recommendations on the adoption of SS modulations along with a general reflection on the evolution of EMC requirements are finally given

Interference of Spread-Spectrum Switching-Mode Power Converters and Low-Frequency Digital Lines

The interference between switching mode power converters and wireline digital communications is addressed in this paper and the impact on communication errors of different Spread Spectrum (SS) modulation techniques, which are commonly used in power convertors to comply with EMC regulations, is experimentally investigated in a particular case. Experimental results do not highlight significant differences in terms of communication error rate induced in the victim data line between power converters featuring conventional and SS pulse width modulations

Limit-cycle free digitally controlled power converter

The work describe an innovative technique intended to increase the resolution of the digital pulse width modulator (DPWM) for limit cycle oscillation (LCO) free operation. More precisely, the novel Dyadic Digital PWM (DDPWM) is adopted as a systematic approach to achieve accurate LCO-free operation in a digital control converter at negligible cost by effectively increasing the resolution of DPWM. The method is analysed and experimentally evaluated

Capacitance-to-Digital Converter for Operation Under Uncertain Harvested Voltage down to 0.3V with No Trimming, Reference and Voltage Regulation

In Paper 5.2, the National University of Singapore and Politecnico di Torino present a capacitance-to-digital converter (CDC) for direct harvester-powered low-cost systems, showing a 7-bit ENOB down to 0.3V at 1.37nW power without any external reference or voltage-regulation requirements

Relaxation Digital-to-Analog Converter with Radix-based Digital Correction

A Relaxation Digital-to-Analog Converter (ReDACs) with a novel, all-digital, radix-based digital correction technique for clock-indifferent linear operation is presented in this paper. The ReDAC architecture proposed in this paper does not require dedicated circuit for frequency tuning, and achieves linearity by digitally pre-processing the DAC input code by a Radix-based Digital Correction (RBDC) algorithm. The effectiveness of the proposed RBDC approach is demonstrated by transistor level simulations on a 10-bit, 1.7MS/s ReDAC in 180nm CMOS. Thanks to the proposed RBDC, under a 16% deviation from the ideal clock period, the maximum INL of the ReDAC is improved from 79.4 to 1.01LSB, its maximum DNL is improved from 158.3 to 0.45LSB and its SNDR is increased from 22.2 (3.4 ENOB) to 58.5dB (9.4 ENOB), at the cost of an increased power consumption from 1.85μW to 9.15μW

Software-Defined DDPM Modulators for D/A Conversion by General-Purpose Microcontrollers

The software implementation of Dyadic Digital Pulse Modulators (DDPMs) for Digital to Analog (D/A) conversion is addressed in this paper. In particular, an enhanced software DDPM implementation is proposed and compared with a plain, iterative software transposition of the basic DDPM hardware architecture. Experimental results on an 8-bit software-defined DDPM D/A converter implemented on a Texas Instrument c2000 microcontroller platform validate the approach, revealing for the novel optimized software DDPM a 6X maximum sample rate compared to the simple iterative implementation on the same microcontroller and at the same system clock frequency. Based on measurements, an 8-bit DDPM DAC featuring the proposed optimized implementation operates at 7.8kS/s with a maximum INL of 1.64LSB, a maximum DNL of 1.79LSB, an SFDR of 47.02dB and a SNDR of 45.27dB, corresponding to 7.23 ENOB, demonstrating the effectiveness and the applicability of the proposed approach to implement a low cost, software-defined D/A converters in microcontroller-based embedded systems