4 research outputs found
Application of a floating well concept to a latch-up-free, low-cost, smart power high-side switch technology
Get PDFThe aim of this brief is to present an original design methodology that permits implementing latch-up-free smart power circuits on a very simple, cost-effective technology. The basic concept used for this purpose is letting float the wells of the MOS transistors most susceptible to initiate latch-up
Application of a floating well concept to a latch-up-free, low-cost, smart power high-side switch technology
Full text linkApplication of a CMOS current mode approach to on-chip current sensing in smart power circuits
No full textApplication of a floating well concept to a latch-up-free, low-cost, smart power high-side switch technology
No full textThe aim of this brief is to present an original design methodology that permits implementing latch-up-free smart power circuits on a very simple, cost-effective technology. The basic concept used for this purpose is letting float the wells of the MOS transistors most susceptible to initiate latch-up
