Current-efficient preamplifier architecture for CMRR sensitive neural recording applications

Este trabajo fue parcialmente financiado por CSIC (Comisión Sectorial de Investigación Científica, Uruguay), ANII (Agencia Nacional de Investigación e Innovación, Uruguay) y CAP (Comisión Académica de Posgrado, Uruguay).There are neural recording applications in which the amplitude of common-mode interfering signals is several orders of magnitude higher than the amplitude of the signals of interest. This challenging situation for neural amplifiers occurs, among other applications, in neural recordings of weakly electric fish or nerve activity recordings made with cuff electrodes. This paper reports an integrated neural amplifier architecture targeting invivo recording of local field potentials and unitary signals from the brain stem of a weakly electric fish Gymnotus omarorum. The proposed architecture offers low noise, high common-mode rejection ratio (CMRR), current-efficiency, and a high-pass frequency fixed without MOS pseudoresistors. The main contributions of this work are the overall architecture coupled with an efficient and simple single-stage circuit for the amplifier main transconductor, and the ability of the amplifier to acquire biopotential signals from high-amplitude common-mode interference in an unshielded environment. A fully-integrated neural preamplifier, which performs well in line with the state-of-the-art of the field while providing enhanced CMRR performance, was fabricated in a 0.5 μm CMOS process. Results from measurements show that the gain is 49.5 dB, the bandwidth ranges from 13 Hz to 9.8 kHz, the equivalent input noise is 1.88 μVrms, the CMRR is 87 dB and the Noise Efficiency Factor is 2.1. In addition, in-vivo recordings of weakly electric fish neural activity performed by the proposed amplifier are introduced and favorably compared with those of a commercial laboratory instrumentation system

Enhanced ICMR amplifier for high CMRR biopotential recordings

PostprintThis paper presents an integrated biopotential preamplifier architecture targeting applications that simultaneously require high common-mode rejection ratio (CMRR), low noise, high input common-mode range (ICMR), and current-efficiency (low Noise Efficiency Factor or NEF). A biopotential preamplifier, which performs well in line with the state-of-the-art of the field while providing enhanced ICMR and CMRR performance, was fabricated in a 0.5 μm CMOS process. Results from measurements show that the gain is 47 dB, the bandwidth ranges from 1 Hz to 7.7 kHz, the equivalent input noise is 1.8 μV rms , the CMRR is 100.5 dB, the ICMR is 1.7 V and the NEF is 3.2

Design and simulation of pressure swing adsorption cycles for CO2 capture

Carbon capture and storage technologies (CCS) are expected to play a key role in the future energy matrix. Different gas separation processes are under investigation with the purpose of becoming a more economical alternative than solvent based post combustion configurations. Previous works have proved that pressure swing adsorption (PSA) cycles manage to reach similar carbon capture targets than conventional amine process but with approx. a 50% lower specific energy consumption when they are applied at lab scale. These encouraging results suggest that research must be undertaken to study the feasibility of this technology at a low to medium power plant scale. The simulation of PSA cycles is a computationally challenging and time consuming task that requires as well a large set of experimentally measured data as input parameters. The assumption of Equilibrium Theory reduces the amount of empirically determined input variables that are necessary for modelling adsorption dynamics as well as enabling a simpler code implementation for the simulators. As part of this work, an Equilibrium Theory PSA cycle solver (Esim) was developed, the novel tool enables the quantification of the thermodynamic limit for a given PSA cycle allowing as well a pre-selection of promising operating conditions and configurations (high separation efficiency) for further investigation by using full governing equation based software The tool presented in this thesis is able to simulate multi-transition adsorption systems that obey any kind of equilibrium isotherm function without modifying its main code. The second part of this work is devoted to the design, simulation and optimisation of two stage two bed Skarmstrom PSA cycles to be applied as a pre-combustion process in a biomass gasification CHP plant. Simulations were carried out employing an in house software (CySim) in which full governing equations have been implemented. An accurate analysis of the operating conditions and cycle configurations was undertaken in order to improve the performance of the carbon capture unit. It was estimated that the energy penalty associated with the incorporation of the adsorptive pre combustion process was lower for a conventional post combustion solvent unit, leading as well to lower specific energy consumption per unit of captured CO2 and higher overall efficiencies for the CHP plant with installed pre-combustion PSA cycles. This work is pioneer in its kind as far as modelling, simulation, optimisation and integration of PSA units in energy industries is concerned and its results are expected to contribute to the deployment of this technology in the future energy matrix

Relaxing the maximum dc input amplitude vs. consumption trade-off in differential-input band-pass biquad filters.

This paper shows that an important part of the power consumption of a biquad band‐pass filter is associated with the feedback loop that fixes the high‐pass frequency and blocks the direct current (dc) input signals. The dc input amplitude that can be blocked is related to the maximum output current that one of the transconductors can provide, hence impacting on the required consumption through this effect. Then, a technique that efficiently blocks the dc input signal and fixes the high‐pass frequency is introduced and analyzed in depth. Moreover, an architecture for ultra‐low‐power differential‐input biquads is fully presented. The proposed architecture enables lowering the power consumption or blocking higher levels of dc input without jeopardizing the power consumption. Results show that the proposed architecture, compared with a traditional one, presents a 30% reduction in power consumption and more than doubles the dc input that can be blocked

Current efficient integrated architecture for common mode rejection sensitive neural recordings

In the last decade we have seen a significant growth of research and potential applications of electronic circuits that interact with the nervous system, in a wide range of applications, from basic neuroscience research to medical clinic, or from the entertainment industry to transport services. The real time acquisition and analysis of brain signals, either through wearable electroencephalography (EEG) or invasive or implantable recordings, in order to perform actions (brain machine interface) or to understand aspects of brain operation, has become scientifically and technologically feasible. This thesis aims to support neural recording applications with low noise, currentefficiency and high common-mode rejection ratio (CMRR) as main features of the recording system. One emblematic example of these applications in the neuroscience domain is the weakly electric fish neural activity recording, where the interference produced by the discharge of the fish electric organ is a key factor. Another example, from the implantable devices domain, is the nerve activity recorded with cuff electrodes, where the desired signal is interfered by electromyographic potentials generated by muscles near the cuff. In these cases, the amplitude of the interfering signals, which mainly appear in common mode, is several orders of magnitude higher than the amplitude of the signals of interest. Therefore, this thesis introduces a novel integrated neural preamplifier architecture targeting CMRR sensitive neural recording applications. The architecture is presented and analyzed in depth, deriving the preamplifier transfer function and the main design equations. We present a detailed analysis of a technique for blocking the input dc component and setting the high-pass frequency without using MOS pseudo-resistors. One of the main contributions of this work is the overall architecture coupled with an efficient and simple single-stage circuit for the preamplifier main transconductor. A fully-integrated neural preamplifier, which performs well in line with the state-ofthe-art of the field while providing enhanced CMRR performance, was fabricated in a 0.5 um CMOS process. Results from measurements show that the measured gain is 49.5 dB, bandwidth ranges from 13 Hz to 9.8 kHz, CMRR is very high (greater than 87 dB), and it is achieved jointly with a remarkable low noise (1.88 uVrms) and current-efficiency (NEF = noise efficiency factor = 2.1). A second version of the preamplifier with one external capacitor achieves a high-pass frequency of 0.1 Hz while keeping the performance of the fully-integrated version. In addition, we present in-vivo measurements made with the proposed architecture in a weakly electric fish (Gymnotus omarorum), showing the ability of the preamplifier to acquire neural signals from high amplitude common mode interference in an unshielded environment. This was the first in-vivo testing of a neural recording integrated circuit designed in Uruguay done in a local lab. Furthermore, signals recorded with our unshielded low-power battery-powered preamplifier perfectly match with those of a shielded commercially-available amplifier (ac-plugged, without power restrictions). To the best of our knowledge, the proposed preamplifier is the best option for applications that simultaneously need low noise, high CMRR and current-efficiency. Furthermore, in this thesis we applied the aforementioned architecture to bandpass biquad filters, specially but not only, to those with differential input. The new architecture provides a significant reduction in consumption (up to 30%) and/or makes it possible to block a higher level of dc at the input (up to the double, without using decoupling capacitors). Next, we applied the novel architecture to the design of the different stages of an integrated programmable analog front-end. Results from simulations shows that the gain is programmable between 57 dB and 99 dB, the low-pass frequency is programmable between 116 Hz and 5.2 kHz, the maximum power consumption is 11.2 uA and the maximum equivalent input-referred noise voltage is 1.87 uVrms. The comparison between our front-end and other works in the state-of-the-art shows that our front-end presents the best results in terms of CMRR and noise, has the greatest value of gain and equals the best NEF reported. Finally, some system-level topics were addressed during this thesis, including the design and implementation of three prototypes of end-to-end wireless biopotentials recording systems based on off-the-shelf components. Developing and applying circuits, systems and methods, for synchronized largescale monitoring of neural activity, sensory images, and behavior, would produce a dynamic picture of the brain function, which is essential for understanding the brain in action. In this context, we hope that the present thesis become our first step to further contribute to this area