A bioinspired optoelectronically engineered artificial neurorobotics device with sensorimotor functionalities

Development of the next generation of bio- and nano-electronics is inseparably connected to the innovative concept of emulation and reproduction of biological sensorimotor systems and artificial neurobotics. Here, we report for the first time principally new artificial bioinspired optoelectronic sensorimotor system for the controlable immitation of opto-genetically engineered neurons in the biological motor system. The device is based on inorganic optical synapse (In-doped TiO2 nanofilm) assembled into a liquid metal (galinstan) actuator. The optoelectronic synapse generates polarised excitatory and inhibitory postsynaptic potentials to trigger the liquid metal droplet to vibrate and then mimic the expansion and contraction of biological fibre muscle. The low-energy consumption and precise modulation of electrical and mechanical outputs are the distinguished characteristics of fabricated sensorimotor system. This work is the underlying significant step towards the development of next generation of low-energy the internet of things for bioinspired neurorobotic and bioelectronic system

Optoelectronic nociceptive sensors based on heterostructured semiconductor films

A visible light optical nociceptive sensor was developed based on the heterostructured plasmonic Au/G2O3/TiO2 semiconductor films. The incorporation of nitrogen atoms and the following phase transformation of G2O3 ultra-thin film during rapid thermal annealing enabled the nociceptive characteristics in heterostructured G2O3/TiO2 plasmonic visible light sensor. The fabricated nociceptor showed the post-synaptic current, nociceptive threshold and non-adaption modes in normal states

Metal/semiconductor hetero-interface engineering for photocurrent controlling in plasmonic photodetectors

The heterointerface engineering at metal/semiconductor (MS) hetero-interfaces in Au/Ga2O3/TiO2 plasmonic photosensors enabled the modulation of charge transfer and photoconductance of detectors for adaptive perception of visible optical lights. The photoconductance at heterointerface between plasmonic Au antenna and main TiO2 semiconductor was modulated by deposition of ultra-thin Ga2O3 film at the Au/TiO2 hetero-interface. The fast and improved photoresponsivity were achieved by the surface functionalization of Au plasmonic antenna with N2 doped Ga2O3 ultra-thin film

Nanoscale all-oxide-heterostructured bio-inspired optoresponsive nociceptor

Retina nociceptor, as a key sensory receptor, not only enables the transport of warning signals to the human central nervous system upon its exposure to noxious stimuli, but also triggers the motor response that minimizes potential sensitization. In this study, the capability of two-dimensional all-oxide-heterostructured artificial nociceptor as a single device with tunable properties was confirmed. Newly designed nociceptors utilize ultra-thin sub-stoichiometric TiO2-Ga2O3 heterostructures, where the thermally annealed Ga2O3 films play the role of charge transfer controlling component. It is discovered that the phase transformation in Ga2O3 is accompanied by substantial jump in conductivity, induced by thermally assisted internal redox reaction of Ga2O3 nanostructure during annealing. It is also experimentally confirmed that the charge transfer in all-oxide heterostructures can be tuned and controlled by the heterointerfaces manipulation. Results demonstrate that the engineering of heterointerfaces of two-dimensional (2D) films enables the fabrication of either high-sensitive TiO2-Ga2O3 (Ar) or high-threshold TiO2-Ga2O3 (N-2) nociceptors. The hypersensitive nociceptor mimics the functionalities of corneal nociceptors of human eye, whereas the delayed reaction of nociceptor is similar to high-threshold nociceptive characteristics of human sensory system. The long-term stability of 2D nociceptors demonstrates the capability of heterointerfaces engineering for effective control of charge transfer at 2D heterostructured devices

Impact of high-k gate dielectric with different angles of coverage on the electrical characteristics of gate-all-around field effect transistor: a simulation study

In this paper, we consider the electrical performance of a circular cross section gate all around-field effect transistor (GAA-FET) in which gate dielectric coverage with high-k dielectric (HfO2) over the channel region has been varied. Our simulations show the fact that as high-k dielectric coverage over the channel increases, ION/IOFF ratio and transconductance over drain current (gm/ID) will be enhanced. Moreover, we investigate the impact of channel length scaling on these devices. The obtained results show that subthreshold slope (SS), drain induced barrier lowering (DIBL) and threshold voltage (VTH) roll-off will be reduced as a result of scaling. In this work TCAD simulator was concisely calibrated against experimental data of a GAA-FET from IBM. The Schrödinger equation is solved in the transverse direction and quantum mechanical confinement effects are taken into account

2D semiconductor nanomaterials and heterostructures : controlled synthesis and functional applications

Two-dimensional (2D) semiconductors beyond graphene represent the thinnest stable known nanomaterials. Rapid growth of their family and applications during the last decade of the twenty-first century have brought unprecedented opportunities to the advanced nano- and opto-electronic technologies. In this article, we review the latest progress in findings on the developed 2D nanomaterials. Advanced synthesis techniques of these 2D nanomaterials and heterostructures were summarized and their novel applications were discussed. The fabrication techniques include the state-of-the-art developments of the vapor-phase-based deposition methods and novel van der Waals (vdW) exfoliation approaches for fabrication both amorphous and crystalline 2D nanomaterials with a particular focus on the chemical vapor deposition (CVD), atomic layer deposition (ALD) of 2D semiconductors and their heterostructures as well as on vdW exfoliation of 2D surface oxide films of liquid metals

The effects of explicit teaching of context clues at undergraduate level in EFL and ESL context

The effects of a 6-session intervention targeting contextual analysis on reading comprehension were investigated in undergraduate university classes, assigned randomly to treatment and control conditions. According to the quantitative analysis of the study, in comparison to control group, using context clues strategy caused an effect on reading comprehension of the EFL and ESL students in experimental group who were taught in how to use different context clues while reading, without considering the role of proficiency level and gender as a variable because there was no interaction between them and strategy use in this study. Thus, implementing context clue strategy as a learning tool deserves more attention by college English instructors in both EFL and ESL context. On the basis of the major findings in this research, college English teachers should keep the students better informed of the significance and specific functions of context clues in contextual guessing and should encourage the students to guess word meanings from context instead of inhibiting it when there are adequate context clues offered

Improvement of a nano-scale silicon on insulator field effect transistor performance using electrode, doping and buried oxide engineering

In this work, a novel Silicon on Insulator (SOI) MOSFET is proposed and investigated. The drain and source electrode structures are optimized to enhance ON-current while global device temperature and hot carrier injection are decreased. In addition, to create an effective heat passage from channel to outside of the device, a silicon region has embedded in the buried oxide. In order to reduce the device leakage current and controlling the threshold voltage, a p-type retrograde doping is introduced into channel region. Since the air has the least permittivity among materials, it can be utilized to decrease the device parasitic capacitances. Based on this, an air gap is embedded in the buried oxide near the silicon to improve RF performance of the device. Because the source and drain electrodes are embedded in and over the silicon film in the source and drain regions, we called this structure EEIOS-SOI MOSFET. “EEIOS” stands for “Embedded Electrodes In and Over the Silicon film”. During this work, EEIOS-SOI MOSFET is compared with a conventional SOI MOSFET and another SOI MOSFET with just Embedded Electrodes In the Silicon Film (EEIS-SOI). EEIS-SOI presents better electrical figure of merits including lower subthreshold slope and lower leakage current in simulations. An immense investigation among these devices shows that EEIOS-SOI MOSFET has better transconductance, lower gate injection leakage current and lower temperature related to DC parameters and higher cut off frequency, gain bandwidth product and unilateral power gain related to AC figures of merits compared to its counterparts

Improvement of a nano-scale silicon on insulator field effect transistor performance using electrode, doping and buried oxide engineering

In this work, a novel Silicon on Insulator (SOI) MOSFET is proposed and investigated. The drain and source electrode structures are optimized to enhance ON-current while global device temperature and hot carrier injection are decreased. In addition, to create an effective heat passage from channel to outside of the device, a silicon region has embedded in the buried oxide. In order to reduce the device leakage current and controlling the threshold voltage, a p-type retrograde doping is introduced into channel region. Since the air has the least permittivity among materials, it can be utilized to decrease the device parasitic capacitances. Based on this, an air gap is embedded in the buried oxide near the silicon to improve RF performance of the device. Because the source and drain electrodes are embedded in and over the silicon film in the source and drain regions, we called this structure EEIOS-SOI MOSFET. “EEIOS” stands for “Embedded Electrodes In and Over the Silicon film”. During this work, EEIOS-SOI MOSFET is compared with a conventional SOI MOSFET and another SOI MOSFET with just Embedded Electrodes In the Silicon Film (EEIS-SOI). EEIS-SOI presents better electrical figure of merits including lower subthreshold slope and lower leakage current in simulations. An immense investigation among these devices shows that EEIOS-SOI MOSFET has better transconductance, lower gate injection leakage current and lower temperature related to DC parameters and higher cut off frequency, gain bandwidth product and unilateral power gain related to AC figures of merits compared to its counterparts