Circuits and Systems for On-Chip RF Chemical Sensors and RF FDD Duplexers

Integrating RF bio-chemical sensors and RF duplexers helps to reduce cost and area in the current applications. Furthermore, new applications can exist based on the large scale integration of these crucial blocks. This dissertation addresses the integration of RF bio-chemical sensors and RF duplexers by proposing these initiatives. A low power integrated LC-oscillator-based broadband dielectric spectroscopy (BDS) system is presented. The real relative permittivity ε’r is measured as a shift in the oscillator frequency using an on-chip frequency-to-digital converter (FDC). The imaginary relative permittivity ε”r increases the losses of the oscillator tank which mandates a higher dc biasing current to preserve the same oscillation amplitude. An amplitude-locked loop (ALL) is used to fix the amplitude and linearize the relation between the oscillator bias current and ε”r. The proposed BDS system employs a sensing oscillator and a reference oscillator where correlated double sampling (CDS) is used to mitigate the impact of flicker noise, temperature variations and frequency drifts. A prototype is implemented in 0.18 µm CMOS process with total chip area of 6.24 mm^2 to operate in 1-6 GHz range using three dual bands LC oscillators. The achieved standard deviation in the air is 2.1 ppm for frequency reading and 110 ppm for current reading. A tunable integrated electrical balanced duplexer (EBD) is presented as a compact alternative to multiple bulky SAW and BAW duplexers in 3G/4G cellular transceivers. A balancing network creates a replica of the transmitter signal for cancellation at the input of a single-ended low noise amplifier (LNA) to isolate the receive path from the transmitter. The proposed passive EBD is based on a cross-connected transformer topology without the need of any extra balun at the antenna side. The duplexer achieves around 50 dB TX-RX isolation within 1.6-2.2 GHz range up to 22 dBm. The cascaded noise figure of the duplexer and LNA is 6.5 dB, and TX insertion loss (TXIL) of the duplexer is about 3.2 dB. The duplexer and LNA are implemented in 0.18 µm CMOS process and occupy an active area of 0.35 mm^2

High-temperature Electrochemical Systems for Clean Energy Production

With the depletion of fossil fuels and increase in carbon emissions, power generation using clean energy technology remains a major research thrust today. High temperature electrochemical systems such as solid oxide fuel cells (SOFC) are upcoming energy conversion systems with advantages of fuel flexibility, high efficiency, and cost effectiveness. Our research at KSU focuses on the development of a fundamental understanding of various surface and interfacial degradation modes in fuel cells. This study will highlight ongoing research from both the computational and experimental work and the fundamental working principle of SOFC will be presented. Simulation data pertaining to the structural stability of fuel cells under thermal gradient and cycling conditions will be discussed. Experimental results of fabrication of laboratory scale single fuel cell will be highlighted, and performance matrix will be discussed. Results from high-temperature oxidation and measurement of electrical conductivity at elevated temperatures on stainless steel samples will also be discussed. SOFC power systems find numerous applications in automotive, residential power grids, industrial power plants, and in mission-critical projects

Dynamic modeling and control of a Quadrotor using linear and nonlinear approaches

With the huge advancements in miniature sensors, actuators and processors depending mainly on the Micro and Nano-Electro-Mechanical-Systems (MEMS/NEMS), many researches are now focusing on developing miniature flying vehicles to be used in both research and commercial applications. This thesis work presents a detailed mathematical model for a Vertical Takeo ff and Landing (VTOL) type Unmanned Aerial Vehicle(UAV) known as the quadrotor. The nonlinear dynamic model of the quadrotor is formulated using the Newton-Euler method, the formulated model is detailed including aerodynamic effects and rotor dynamics that are omitted in many literature. The motion of the quadrotor can be divided into two subsystems; a rotational subsystem (attitude and heading) and a translational subsystem (altitude and x and y motion). Although the quadrotor is a 6 DOF underactuated system, the derived rotational subsystem is fully actuated, while the translational subsystem is underactuated. The derivation of the mathematical model is followed by the development of four control approaches to control the altitude, attitude, heading and position of the quadrotor in space. The fi rst approach is based on the linear Proportional-Derivative-Integral (PID) controller. The second control approach is based on the nonlinear Sliding Mode Controller (SMC). The third developed controller is a nonlinear Backstepping controller while the fourth is a Gain Scheduling based PID controller. The parameters and gains of the forementioned controllers were tuned using Genetic Algorithm (GA) technique to improve the systems dynamic response. Simulation based experiments were conducted to evaluate and compare the performance of the four developed control techniques in terms of dynamic performance, stability and the effect of possible disturbances

Septate or bicornuate uterus: Accuracy of three-dimensional trans-vaginal ultrasonography and pelvic magnetic resonance imaging

AbstractObjectiveTo estimate the accuracy of 3-dimensional transvaginal ultrasonography (3D-TVUS), hysterosalpingography (HSG) and pelvic magnetic resonance imaging (MRI) in the differentiation between septate and bicornuate uterus.Patients and methodsThirty-six patients with suspected septate or bicornuate uterus on 2D ultrasound or hysterosalpingography (HSG) underwent 3D-TVUS examination, MR imaging, diagnostic laparoscopy and hysteroscopy. HSG was performed only for those patients who did not undergo the procedure before (21 patients), we retrospectively revised the hysterosalpingography of 15 patients performed outside our hospital with acceptable quality.ResultsHSG showed sensitivity of 77.4%, specificity of 60% and overall accuracy of 75% in the differentiation between the septate and bicornuate uterus. MRI showed sensitivity of 93.5%, specificity of 80%, PPV of 96.6% and negative predicative value of 66.6%, with overall accuracy of 91.6%. The 3D ultrasound showed the highest diagnostic parameters, with sensitivity of 96.7%, specificity of 100%, PPV of 100% and negative predicative value of 83.3%, with overall accuracy of 97.2%.ConclusionsTransvaginal 3-D ultrasonography is accurate for diagnosis and differentiation between septate uterus and bicornuate uterus. We recommend 3-D transvaginal ultrasonography as the first and only mandatory step in the assessment of the uterine cavity in patients with a suspected septate or bicornuate uterus, especially before planning surgery. MRI should be preserved for patients in whom 3D TVS is not possible like virgins

Digital enhancement techniques for fractional-N frequency synthesizers

Meeting the demand for unprecedented connectivity in the era of internet-of-things (IoT) requires extremely energy efficient operation of IoT nodes to extend battery life. Managing the data traffic generated by trillions of such nodes also puts severe energy constraints on the data centers. Clock generators that are essential elements in these systems consume significant power and therefore must be optimized for low power and high performance. The focus of this thesis is on improving the energy efficiency of frequency synthesizers and clocking modules by exploring design techniques at both the architectural and circuit levels. In the first part of this work, a digital fractional-N phase locked loop (FNPLL) that employs a high resolution time-to-digital converter (TDC) and a truly ΔΣ fractional divider to achieve low in-band noise with a wide bandwidth is presented. The fractional divider employs a digital-to-time converter (DTC) to cancel out ΔΣ quantization noise in time domain, thus alleviating TDC dynamic range requirements. The proposed digital architecture adopts a narrow range low-power time-amplifier based TDC (TA-TDC) to achieve sub 1ps resolution. Fabricated in 65nm CMOS process, the prototype PLL achieves better than -106dBc/Hz in-band noise and 3MHz PLL bandwidth at 4.5GHz output frequency using 50MHz reference. The PLL achieves excellent jitter performance of 490fsrms, while consumes only 3.7mW. This translates to the best reported jitter-power figure-of-merit (FoM) of -240.5dB among previously reported FNPLLs. Phase noise performance of ring oscillator based digital FNPLLs is severely compromised by conflicting bandwidth requirements to simultaneously suppress oscillator phase and quantization noise introduced by the TDC, ΔΣ fractional divider, and digital-to-analog converter (DAC). As a consequence, their FoM that quantifies the power-jitter tradeoff is at least 25dB worse than their LC-oscillator based FNPLL counterparts. In the second part of this thesis, we seek to close this performance gap by extending PLL bandwidth using quantization noise cancellation techniques and by employing a dual-path digital loop filter to suppress the detrimental impact of DAC quantization noise. A prototype was implemented in a 65nm CMOS process operating over a wide frequency range of 2.0GHz-5.5GHz using a modified extended range multi-modulus divider with seamless switching. The proposed digital FNPLL achieves 1.9psrms integrated jitter while consuming only 4mW at 5GHz output. The measured in-band phase noise is better than -96 dBc/Hz at 1MHz offset. The proposed FNPLL achieves wide bandwidth up to 6MHz using a 50 MHz reference and its FoM is -228.5dB, which is at about 20dB better than previously reported ring-based digital FNPLLs. In the third part, we propose a new multi-output clock generator architecture using open loop fractional dividers for system-on-chip (SoC) platforms. Modern multi-core processors use per core clocking, where each core runs at its own speed. The core frequency can be changed dynamically to optimize for performance or power dissipation using a dynamic frequency scaling (DFS) technique. Fast frequency switching is highly desirable as long as it does not interrupt code execution; therefore it requires smooth frequency transitions with no undershoots. The second main requirement in processor clocking is the capability of spread spectrum frequency modulation. By spreading the clock energy across a wide bandwidth, the electromagnetic interference (EMI) is dramatically reduced. A conventional PLL clock generation approach suffers from a slow frequency settling and limited spread spectrum modulation capabilities. The proposed open loop fractional divider architecture overcomes the bandwidth limitation in fractional-N PLLs. The fractional divider switches the output frequency instantaneously and provides an excellent spread spectrum performance, where precise and programmable modulation depth and frequency can be applied to satisfy different EMI requirements. The fractional divider has unlimited modulation bandwidth resulting in spread spectrum modulation with no filtering, unlike fractional-N PLL; consequently it achieves higher EMI reduction. A prototype fractional divider was implemented in a 65nm CMOS process, where the measured peak-to-peak jitter is less than 27ps over a wide frequency range from 20MHz to 1GHz. The total power consumption is about 3.2mW for 1GHz output frequency. The all-digital implementation of the divider occupies the smallest area of 0.017mm2 compared to state-of-the-art designs. As the data rate of serial links goes higher, the jitter requirements of the clock generator become more stringent. Improving the jitter performance of conventional PLLs to less than (200fsrms) always comes with a large power penalty (tens of mWs). This is due to the PLL coupled noise bandwidth trade-off, which imposes stringent noise requirements on the oscillator and/or loop components. Alternatively, an injection-locked clock multiplier (ILCM) provides many advantages in terms of phase noise, power, and area compared to classical PLLs, but they suffer from a narrow lock-in range and a high sensitivity to PVT variations especially at a large multiplication factor (N). In the fourth part of this thesis, a low-jitter, low-power LC-based ILCM with a digital frequency-tracking loop (FTL) is presented. The proposed FTL relies on a new pulse gating technique to continuously tune the oscillator's free-running frequency. The FTL ensures robust operation across PVT variations and resolves the race condition existing in injection locked PLLs by decoupling frequency tuning from the injection path. As a result, the phase locking condition is only determined by the injection path. This work also introduces an accurate theoretical large-signal analysis for phase domain response (PDR) of injection locked oscillators (ILOs). The proposed PDR analysis captures the asymmetric nature of ILO's lock-in range, and the impact of frequency error on injection strength and phase noise performance. The proposed architecture and analysis are demonstrated by a prototype fabricated in 65 nm CMOS process with active area of 0.25mm2. The prototype ILCM multiplies the reference frequency by 64 to generate an output clock in the range of 6.75GHz-8.25GHz. A superior jitter performance of 190fsrms is achieved, while consuming only 2.25mW power. This translates to a best FoM of -251dB. Unlike conventional PLLs, ILCMs have been fundamentally limited to only integer-N operation and cannot synthesize fractional-N frequencies. In the last part of this thesis, we extend the merits of ILCMs to fractional-N and overcome this fundamental limitation. We employ DTC-based QNC techniques in order to align injected pulses to the oscillator's zero crossings, which enables it to pull the oscillator toward phase lock, thus realizing a fractional-N ILCM. Fabricated in 65nm CMOS process, a prototype 20-bit fractional-N ILCM with an output range of 6.75GHz-8.25GHz consumes only 3.25mW. It achieves excellent jitter performance of 110fsrms and 175fsrms in integer- and fractional-N modes respectively, which translates to the best-reported FoM in both integer- (-255dB) and fractional-N (-252dB) modes. The proposed fractional-N ILCM also features the first-reported rapid on/off capability, where the transient absolute jitter performance at wake-up is bounded below 4ps after less than 4ns. This demonstrates almost instantaneous phase settling. This unique capability enables tremendous energy saving by turning on the clock multiplier only when needed. This energy proportional operation leverages idle times to save power at the system-level of wireline and wireless transceivers

Deep learning-based classification of eye diseases using Convolutional Neural Network for OCT images

Deep learning shows promising results in extracting useful information from medical images. The proposed work applies a Convolutional Neural Network (CNN) on retinal images to extract features that allow early detection of ophthalmic diseases. Early disease diagnosis is critical to retinal treatment. Any damage that occurs to retinal tissues that cannot be recovered can result in permanent degradation or even complete loss of sight. The proposed deep-learning algorithm detects three different diseases from features extracted from Optical Coherence Tomography (OCT) images. The deep-learning algorithm uses CNN to classify OCT images into four categories. The four categories are Normal retina, Diabetic Macular Edema (DME), Choroidal Neovascular Membranes (CNM), and Age-related Macular Degeneration (AMD). The proposed work uses publicly available OCT retinal images as a dataset. The experimental results show significant enhancement in classification accuracy while detecting the features of the three listed diseases

Methotrexate in the Treatment of Non-Melanoma Skin Cancers

Background: There are three types of non-melanoma skin cancer (NMSC): basal (BCC), keratoacanathoma (KA), and cutaneous squamous cell carcinoma (cSCC). These three malignancies account for 99 percent of all tumors in this category. Because it slows DNA synthesis in quickly proliferating cells, methotrexate (MTX) is an effective treatment for tumors that are fast developing. To prevent the production of the purine nucleotide thymidine, it inhibits the development of tetrahydrofolate by binding to the dihydrofolate reductase. Objective: To assess the efficacy and safety of MTX in the treatment of NMSCs.Conclusion: When used as a less intrusive and less expensive treatment for NMSCs, MTX has the potential to be a very effective and safe alternative treatment, especially in patients who are elderly or have other medical conditions