Packaging challenges and reliability performance of compound semiconductor focal plane arrays

The development of new high-performance Focal Plane Arrays (FPAs) for imaging systems is driven by advances in photodetector material growth and processing, readout integrated circuits and IR detector chip hybridisation/packaging. The hybridisation of the IR detector chip and the readout integrated circuit (ROIC) through flip-chip bonding is a key packaging challenge for pixel arrays with very small indium bumps and 10-30 m pitch sizes. This paper details the development and use of finite element models that can be used to assess and optimise the compression bonding process, and can enable insights into the impact of chip misalignment on the resulting flip-chip quality and the bonding equipment placement accuracy requirements for a given FPA specification. In addition, the fatigue performance of the indium interconnects of different fine pitch FPAs is evaluated and compared. The modelling results point that high quality interconnects and robust, defects-free assembly require micrometre placement accuracy. It is also possible that indium joints of higher resolution, larger size FPAs accumulate less damage under cryogenic temperature cycling compared to less dense, smaller in size, focal plane arrays

Modeling Insights into the assembly challenges of focal plane arrays

Ongoing technological advances in photodetector material growth and processing, readout integrated circuits, and robust hybridization (packaging) methods for assembling high-resolution and small-pitch size pixel arrays are the main enabling factors for pushing the frontiers of high-performance Focal Plane Array (FPA) technologies for imaging systems. This paper details the development of analytical and numerical models and demonstrates their use to generate insights into the feasibility of two flip-chip assembly processes for packaging infrared (IR) detector chips. The modelling studies focus on the challenges of forming the indium interconnection arrays in the case of the FPA technologies using Group III-V compound semiconductor materials and ultra-fine pitch pixel array layouts. The accurate alignment of the IR detector chip onto the readout chip in the case of high-density pixel architectures is a critical requirement for the packaging process. To gain better understanding of this requirement, which has a clear implication for the quality and subsequent reliability performance of the FPA, compression and reflow bonding process models are developed using suitable modeling approaches and methods and then demonstrated for two distinctive focal plane array design configurations. The novelty of this work is in the developed modeling capabilities utilizing different computational methods, from large deformation and contact analysis finite element to energy-based and harmonic motion mechanics, to characterize and optimize the mechanical and dynamic non-linear behavior of the indium solder joints and their formation during FPA packaging. The feasibility of bonding techniques for different resolution FPAs and under flip-chip misalignment conditions is assessed. The modeling results pointed to a very strict, sub-micrometer flip-chip placement accuracy requirement for the assembly of FPAs with ultra-fine indium bump array resolution

Development of an automated assessment technology for detecting damage in body armour

Hard ballistic body armour plates are designed to withstand the impact of a bullet and protect the wearer, if this happens the armour is clearly damaged and so is retired from service. Mishandling, however, such as dropping the armour, may cause minor and difficult to detect damage which compromises the effectiveness of the plate. Current methods of inspection involve shipping the plates to a central location, performing a thorough inspection and returning them to service if uncompromised; this is costly and requires redundancy of equipment for when not in service. AcoustoUltrasonics is a method of structural health monitoring in which ultrasonic waves are excited in a structure by a transducer and receivers record the response, any deviation from a baseline measurement give an indication of damage within the structure. Within this paper the development and testing of a novel handheld prototype device is presented, which gives a simple yes/no answer to if there is damage on the plate. This inspection is quick and easy to perform by unskilled personnel. Low profile sensors have been utilised combined with a novel flexible circuitry with built in memory, which does not compromise the effectiveness of the armour

Predictive analytics methodology for smart qualification testing of electronic components

In electronics manufacturing, the required quality of electronic modules (e.g. packaged electronic devices) are evaluated through qualification testing using standards and user-defined requirements. The challenge for the electronics industry is that product qualification testing is time-consuming and costly. This paper focuses on the development and demonstration of a novel approach for smarter qualification using test data from the production line along with integrated computational techniques for data mining/analytics and data-driven forecasting (i.e. prognostics) modelling. The most common type of testing in the electronics industry - sequentially run electrical multi-parameter tests on the Device-under-Test (DUT), is considered. The proposed data mining (DM) framework can identify the tests that have strong correlation to pending failure of the device in the qualification (tests sensitive to pending failure) as well as to evaluate the similarity in test measurements, thus generating knowledge on potentially redundant tests. Mining the data in this context and with the proposed approach represents a major new contribution because it uncovers embedded knowledge and information in the production test data that can enable intelligent optimisation of the tests’ sequence and reduce the number of tests. The intelligent manufacturing concept behind the development of data-driven prognostics models using machine learning (ML) techniques is to use data only from a small number of tests from the full qualification specification as training data in the process of model construction. This model can then forecast the overall qualification outcome for a DUT - Pass or Fail - without performing all other remaining tests. The novelty in the context of machine learning is in the selection of the data features for the training dataset using results from tests sensitive to pending failure. Support Vector Machine (SVM) binary classifiers SVM models built with data from tests sensitive to the outcome that the module will fail are shown to have superior performance compared with models trained with other datasets of tests. Case studies based on the use of real industrial production test data for an electronic module are included in the paper to demonstrate and validate the computational approach. This work is both novel and original because at present, to the best knowledge of the authors, such predictive analytics methodology applied to qualification testing and providing benefits of test time and hence cost reduction are non-existent in the electronics industry. The integrated data analytics-prognostics approach, deployable for both off-line and in-line optimisation of production test procedures, has the potential to transform current practices by exploiting in a smarter way information and knowledge available with large datasets of qualification test data

Review of battery powered embedded systems design for mission-critical low-power applications

The applications and uses of embedded systems is increasingly pervasive. Mission and safety critical systems relying on embedded systems pose specific challenges. Embedded systems is a multi-disciplinary domain, involving both hardware and software. Systems need to be designed in a holistic manner so that they are able to provide the desired reliability and minimise unnecessary complexity. The large problem landscape means that there is no one solution that fits all applications of embedded systems. With the primary focus of these mission and safety critical systems being functionality and reliability, there can be conflicts with business needs, and this can introduce pressures to reduce cost at the expense of reliability and functionality. This paper examines the challenges faced by battery powered systems, and then explores at more general problems, and several real-world embedded systems

Printed-Sensor-on-Chip devices – Aerosol jet deposition of thin film relative humidity sensors onto packaged integrated circuits

In this paper we report on the development of an aerosol jet printed sensing platform integrating elements of silicon and printed electronics. To demonstrate the technology, thin film humidity sensors have been fabricated over the top surface and sides of pre-packaged integrated circuits using a combination of direct-write aerosol jet deposition and drop-casting. The resistive based sensor consists of an aerosol jet deposited interdigitated nano-particle silver electrode structure overlaid with a thin film of Nafion® acting as a humidity sensitive layer. The fabricated sensor displayed a strong response to changes in relative humidity over the tested range (40% RH to 80% RH) and showed a low level of hysteresis whilst undergoing cyclic testing. The successful fabrication of relative humidity sensors over the surface and pins of a packaged integrated circuit demonstrates a new level of integration between printed and silicon based electronics − leading to Printed-Sensor-on-Chip devices. Whilst demonstrated for humidity, the proposed concept is envisaged to work as a platform for a wide range of applications, from bio-sensing to temperature or gas monitoring