RTS noise impact in CMOS image sensors readout circuit

CMOS image sensors are nowadays widely used in imaging applications even for high end applications. This is really possible thanks to a reduction of noise obtained, among others, by Correlated Double Sampling (CDS) readout. Random Telegraph Signal (RTS) noise has thus become an issue for low light level applications especially in the context of downscaling transistor dimension. This paper describes the analysis of in-pixel source follower transistor RTS noise filtering by CDS circuit. The measurement of a non Gaussian distribution with a positive skew of image sensor output noise is analysed and dimension (W and L) impact of the in-pixel source follower is analysed

Novel readout circuit architecture for CMOS image sensors minimizing RTS noise

This letter presents a novel readout architecture and its associated readout sequence for complementary metal–oxide– semiconductor (CMOS) image sensors (CISs) based on switch biasing techniques in order to reduce noisy pixel numbers induced by in-pixel source-follower transistor random telegraph signal noise. Measurement results done on a test image sensor designed with 0.35-μm CIS technology demonstrate an efficient reduction of noisy pixel numbers without a pixel performance decrease

Low-frequency noise impact on CMOS image sensors

CMOS image sensors are nowadays extensively used in imaging applications even for high-end applications. This is really possible thanks to a reduction of noise obtained, among others, by Correlated Double Sampling (CDS) readout. Random Telegraph Signal (RTS) noise has thus become an issue for low light level applications especially in the context of downscaling transistor size. This paper describes the analysis of in-pixel source follower transistor RTS noise filtering by CDS circuit. The measurement of a non Gaussian distribution with a positive skew of image sensor output noise is analysed. Impact of dimensions (W and L) of the in-pixel source follower is demonstrated. Circuit to circuit pixel output noise dispersion on 12 circuits coming from 3 different wafers is also analysed and weak dispersion is seen

Custom transistor layout design techniques for random telegraph signal noise reduction in CMOS image sensors

Interface and near oxide traps in small gate area MOS transistors (gate area ,1 mm2) lead to RTS noise which implies the emergence of noisy pixels in CMOS image sensors. To reduce this noise, two simple and efficient layout techniques of custom transistors have been imagined. These techniques have been successfully implemented in an image sensor test chip fabricated in a 0.35 mm CMOS image sensor process. Experimental results demonstrate a significant reduction of the noisy pixels for the two different techniques

Overview of CMOS process and design options for image sensor dedicated to space applications

With the growth of huge volume markets (mobile phones, digital cameras…) CMOS technologies for image sensor improve significantly. New process flows appear in order to optimize some parameters such as quantum efficiency, dark current, and conversion gain. Space applications can of course benefit from these improvements. To illustrate this evolution, this paper reports results from three technologies that have been evaluated with test vehicles composed of several sub arrays designed with some space applications as target. These three technologies are CMOS standard, improved and sensor optimized process in 0.35µm generation. Measurements are focussed on quantum efficiency, dark current, conversion gain and noise. Other measurements such as Modulation Transfer Function (MTF) and crosstalk are depicted in [1]. A comparison between results has been done and three categories of CMOS process for image sensors have been listed. Radiation tolerance has been also studied for the CMOS improved process in the way of hardening the imager by design. Results at 4, 15, 25 and 50 krad prove a good ionizing dose radiation tolerance applying specific techniques

A high dynamic range digital LinLog CMOS image sensor architecture based on Event Readout of pixels and suitable for low voltage operation

Several approaches have been developed to extend the dynamic range of image sensor in order to keep all the information content of natural scenes covering a very broad range of illumination. Digital CMOS image sensor are especially well suited to wide dynamic range imaging by implementing dual sampling, multiple exposure methods using either column or in pixel ADC, or Address Event Representation. A new architecture of digital high dynamic range CMOS image sensor, suitable for low voltage operation, has been developed that implements a built-in dynamic compression function targeted to LinLog behavior, by combining an event based readout of pixels, the use of multiple integrations per frame and the coding of pixel values using the mantissa-exponent principle, to achieve the dynamic range extension

Analysis and Optimization of Noise Response for Low-Noise CMOS Image Sensors

CMOS image sensors are nowadays widely used in imaging applications and particularly in low light flux applications. This is really possible thanks to a reduction of noise obtained, among others, by the use of pinned photodiode associated with a Correlated Double Sampling readout. It reveals new noise sources which become the major contributors. This paper presents noise measurements on low-noise CMOS image sensor. Image sensor noise is analyzed and optimization is done in order to reach an input referred noise of 1 electron rms by column gain amplifier insertion and dark current noise optimization. Pixel array noise histograms are analyzed to determine noise impact of dark current and column gain amplifier insertion. Transfer noise impact, due to the use of pinned photodiode (4T photodiode), is also measured and analyzed by a specific readout sequence

A digital high-dynamic-range CMOS image sensor with multi-integration and pixel readout request

A novel principle has been developed to build an ultra wide dynamic range digital CMOS image sensor. Multiple integrations are used to achieve the required dynamic. Its innovative readout system allows a direct capture of the final image from the different exposure time with no need of external reconstruction. The sensor readout system is entirely digital, implementing an in-pixel ADC. Realized in the STMicroelectronics 0.13μm CMOS standard technology, the 10μm x 10μm pixels contain 42 transistors with a fill factor of 25%. The sensor is able to capture more than 120dB dynamic range scenes at video rate

New source of random telegraph signal in CMOS image sensors

We report a new source of dark current random telegraph signal in CMOS image sensors due to meta-stable Shockley-Read-Hall generation mechanism at oxide interfaces. The role of oxide defects is discriminated thanks to the use of ionizing radiations

Evidence of a novel source of random telegraph signal in CMOS image sensors

This letter reports a new source of dark current random telegraph signal in CMOS image sensors due to meta-stable Shockley-Read-Hall generation mechanism at oxide interfaces. The role of oxide defects is discriminated thanks to the use of ionizing radiations. A dedicated RTS detection technique and several test conditions (radiation dose, temperature, integration time, photodiode bias) reveal the particularities of this novel source of RTS