High Dynamic Range Pinned Photodiode Pixel with Floating Gate Readout and Dual Gain

This paper presents a pixel based on the pinned photodiode (PPD) with high dynamic range achieved via in-pixel dual conversion gain. The pixel operates with a single exposure and a single charge transfer out of the PPD. The signal charge is first converted to voltage non-destructively with low gain using capacitive coupling to a floating gate. A second conversion with high gain follows at a pn junction-based sense node after another charge transfer. An increased dynamic range is achieved due to the sensing of the same charge with two different conversion gains. The results from a prototype 10 μm pitch pixel, manufactured in a 180 nm CMOS image sensor process, demonstrate conversion gain ratio of 3:1, dynamic range of 93.5 dB, 2.4 e⁻ RMS readout noise, and negligible image lag. The pixel can operate in global shutter mode with the same low noise as in rolling shutter due to the intermediate signal storage under the floating gate

Pinned Photodiode Imaging Pixel With Floating Gate Readout and Dual Gain

We present an imaging pixel featuring dual conversion gain in a single exposure based on the pinned photodiode (PPD). The signal charge is first converted to voltage nondestructively using a floating gate, and a second conversion is done at a p-n junction-based sense node (SN). Higher signal dynamic range (DR) is achieved due to the sensing of the same charge with two different conversion gains. The results from a prototype 10- μ m-pitch pixel manufactured in a 180-nm CMOS image sensor process demonstrate a gain ratio of 3, DR of 90 dB, 3.6 e − rms readout noise, and negligible image lag

Simulations and Design of a Single-Photon CMOS Imaging Pixel Using Multiple Non-Destructive Signal Sampling

A single-photon CMOS image sensor (CIS) design based on pinned photodiode (PPD) with multiple charge transfers and sampling is described. In the proposed pixel architecture, the photogenerated signal is sampled non-destructively multiple times and the results are averaged. Each signal measurement is statistically independent and by averaging, the electronic readout noise is reduced to a level where single photons can be distinguished reliably. A pixel design using this method was simulated in TCAD and several layouts were generated for a 180-nm CMOS image sensor process. Using simulations, the noise performance of the pixel was determined as a function of the number of samples, sense node capacitance, sampling rate and transistor characteristics. The strengths and limitations of the proposed design are discussed in detail, including the trade-off between noise performance and readout rate and the impact of charge transfer inefficiency (CTI). The projected performance of our first prototype device indicates that single-photon imaging is within reach and could enable ground-breaking performances in many scientific and industrial imaging applications

Effective mobilities in pseudomorphic Si/SiGe/Si p-channel metal-oxide-semiconductor field-effect transistors with thin silicon capping layers

The room-temperature effective mobilities of pseudomorphic Si/Si0.64Ge0.36/Si p-metal-oxidesemiconductor field effect transistors are reported. The peak mobility in the buried SiGe channel increases with silicon cap thickness. It is argued that SiO2/Si interface roughness is a major source of scattering in these devices, which is attenuated for thicker silicon caps. It is also suggested that segregated Ge in the silicon cap interferes with the oxidation process, leading to increased SiO2/Si interface roughness in the case of thin silicon caps

Improved QE in CMOS image sensors with nano-black antireflection layer

A novel anti-reflection process is demonstrated which improves the quantum efficiency (QE) of a CMOS image sensor, with particular benefits at the ultraviolet (UV) and near infrared (NIR) ends of the electromagnetic spectrum. Also, the dark current and photoresponse non-uniformity (PRNU) were reduced to about 33% and 55%, respectively, of the values for a conventional control sensor. The nano-black anti-reflection layer was made using a reactive-ion-etch technique to form nano-scale spikes at the surface which greatly reduce the reflectivity of the surface, which has a matt-black appearance. The sensor used, a CIS115 from Teledyne-e2v, is a back-sideilluminated (BSI) device with ≈10 µm active silicon thickness and 2000 X 1504 pinned photodiode pixels with a pitch of 7 µm. The improved QE is most impressive at UV wavelengths, below 400 nm, where the QE increases towards 100%, although no correction was made for an increased electron generation rate, as this is not easily quantified. This high QE result is compared with a conventional antireflection (AR) coating which shows a steep drop in QE below 400 nm. There is also an improvement in QE in the NIR (from 700 nm to 1100 nm) for the nano-black sensor, and this is despite the approx. 1 µm thinning of the silicon by the etching process, which would normally reduce the QE. Some of the QE improvement may be the result of increased scattering of the incident light, which is supported by the reduced PRNU

Interfacial engineering of semiconductor–superconductor junctions for high performance micro-coolers

The control of electronic and thermal transport through material interfaces is crucial for numerous micro and nanoelectronics applications and quantum devices. Here we report on the engineering of the electro-thermal properties of semiconductor-superconductor (Sm-S) electronic cooler junctions by a nanoscale insulating tunnel barrier introduced between the Sm and S electrodes. Unexpectedly, such an interface barrier does not increase the junction resistance but strongly reduces the detrimental sub-gap leakage current. These features are key to achieving high cooling power tunnel junction refrigerators, and we demonstrate unparalleled performance in silicon-based Sm-S electron cooler devices with orders of magnitudes improvement in the cooling power in comparison to previous works. By adapting the junctions in strain-engineered silicon coolers we also demonstrate efficient electron temperature reduction from 300 mK to below 100 mK. Investigations on junctions with different interface quality indicate that the previously unexplained sub-gap leakage current is strongly influenced by the Sm-S interface states. These states often dictate the junction electrical resistance through the well-known Fermi level pinning effect and, therefore, superconductivity could be generally used to probe and optimize metal-semiconductor contact behaviour

CMOS Image Sensor for Broad Spectral Range with >90% Quantum Efficiency

Even though the recent progress made in complementary metal–oxide–semiconductor (CMOS) image sensors (CIS) has enabled numerous applications affecting our daily lives, the technology still relies on conventional methods such as antireflective coatings and ion‐implanted back‐surface field to reduce optical and electrical losses resulting in limited device performance. In this work, these methods are replaced with nanostructured surfaces and atomic layer deposited surface passivation. The results show that such surface nanoengineering applied to a commercial backside illuminated CIS significantly extends its spectral range and enhances its photosensitivity as demonstrated by >90% quantum efficiency in the 300–700 nm wavelength range. The surface nanoengineering also reduces the dark current by a factor of three. While the photoresponse uniformity of the sensor is seen to be slightly better, possible scattering from the nanostructures can lead to increased optical crosstalk between the pixels. The results demonstrate the vast potential of surface nanoengineering in improving the performance of CIS for a wide range of applications

Low frequency noise in Si and Si/SiGe/Si PMOSFETs, Journal of Telecommunications and Information Technology, 2007, nr 2

Measurements of 1/f noise in Si and Si0.64Ge0.36 PMOSFETs have been compared with theoretical models of carrier tunnelling into the oxide. Reduced noise is observed in the heterostructure device as compared to the Si control. We suggest that this is primarily associated with an energy dependent density of oxide trap states and a displacement of the Fermi level at the SiO2 interface in the heterostructure relative to Si. The present study also emphasizes the important role of transconductance enhancement in the dynamic threshold mode in lowering the input referred voltage noise

The characterization of the distant blazar GB6 J1239+0443 from flaring and low activity periods

In 2008 AGILE and Fermi detected gamma-ray flaring activity from the unidentified EGRET source 3EG J1236+0457, recently associated with a flat spectrum radio quasar GB6 J1239+0443 at z=1.762. The optical counterpart of the gamma-ray source underwent a flux enhancement of a factor 15-30 in 6 years, and of ~10 in six months. We interpret this flare-up in terms of a transition from an accretion-disk dominated emission to a synchrotron-jet dominated one. We analysed a Sloan Digital Sky Survey (SDSS) archival optical spectrum taken during a period of low radio and optical activity of the source. We estimated the mass of the central black hole using the width of the CIV emission line. In our work, we have also investigated SDSS archival optical photometric data and UV GALEX observations to estimate the thermal-disk emission contribution of GB6 J1239+0443. Our analysis of the gamma-ray data taken during the flaring episodes indicates a flat gamma-ray spectrum, with an extension of up to 15 GeV, with no statistically-relevant sign of absorption from the broad line region, suggesting that the blazar-zone is located beyond the broad line region. This result is confirmed by the modeling of the broad-band spectral energy distribution (well constrained by the available multiwavelength data) of the flaring activity periods and by the accretion disk luminosity and black hole mass estimated by us using archival data.Comment: 30 pages, 7 figures, 4 tables MNRAS Accepted on 2012 June 1