14 research outputs found

    Surface-Functionalized Nanoparticles as Catalysts for Artificial Photosynthesis

    Get PDF
    Altres ajuts: acords transformatius de la UABAnalogously to enzymatic catalysis, where the active metal sites and their environment are controlled by protein residues, the catalytic properties of metal nanoparticles (NPs) can be tuned by carefully selecting their surface-coordinated species. In artificial photosynthesis, surface-functionalization emerged in the last decade, grounded on the development of reliable methods for tailored synthesis, advanced characterization and theoretical modeling of metal NPs, altogether with the aim of transferring to the nanoscale the mechanistic knowledge acquired from molecular complexes. Metal NPs surface-functionalization modulates the energetics of key catalytic intermediates, introduces second coordination sphere effects, influences the catalyst-electrolyte interface, and determines the metal NPs surface coverage and, accordingly, the number of accessible active sites. In photoactivated systems, metal NPs surface-functionalization may play a key role in modulating the charge transfers and recombination processes between the light absorber and the active sites and in the light absorber itself. Thus, after a presentation of the most relevant synthetic methods to produce well-defined surface-functionalized metal NPs, a critical analysis of why the above effects are the cornerstone in enhancing their catalytic performance in the key processes of artificial photosynthesis, namely the oxygen evolution reaction, the hydrogen evolution reaction, and the CO2 reduction reaction, is given

    Runtime-guided management of scratchpad memories in multicore architectures

    Get PDF
    © 2015 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.The increasing number of cores and the anticipated level of heterogeneity in upcoming multicore architectures cause important problems in traditional cache hierarchies. A good way to alleviate these problems is to add scratchpad memories alongside the cache hierarchy, forming a hybrid memory hierarchy. This memory organization has the potential to improve performance and to reduce the power consumption and the on-chip network traffic, but exposing such a complex memory model to the programmer has a very negative impact on the programmability of the architecture. Emerging task-based programming models are a promising alternative to program heterogeneous multicore architectures. In these models the runtime system manages the execution of the tasks on the architecture, allowing them to apply many optimizations in a generic way at the runtime system level. This paper proposes giving the runtime system the responsibility to manage the scratchpad memories of a hybrid memory hierarchy in multicore processors, transparently to the programmer. In the envisioned system, the runtime system takes advantage of the information found in the task dependences to map the inputs and outputs of a task to the scratchpad memory of the core that is going to execute it. In addition, the paper exploits two mechanisms to overlap the data transfers with computation and a locality-aware scheduler to reduce the data motion. In a 32-core multicore architecture, the hybrid memory hierarchy outperforms cache-only hierarchies by up to 16%, reduces on-chip network traffic by up to 31% and saves up to 22% of the consumed power.Peer ReviewedPostprint (author's final draft

    Infraestructura viària i sistema territorial. Identitat, natura, economia i participació : la variant d’Olot i l'encaix a les Preses i la Vall d'en Bas

    Get PDF
    Descripció del recurs: 21 d'octubre de 2015Aquest llibre exposa les reflexions i propostes per al traçat viari de l’eix Bracons al seu pas pels municipis de les Preses i de la Vall d’en Bas, considerant especialment la seva comptabilitat amb la continuïtat de l’activitat agrícola i la necessària reordenació de la seva travessera urbana. Es tracta d’una oportunitat per explorar noves metodologies i instruments per al planejament i projecte d’infraestructures. Es presenten els resultats del Workshop organitzat de forma coordinada entre un grup de recerca de la universitat (IntraScapeLab-EXIT-UPC) i una entitat del tercer sector ambiental (CST). L’objectiu és analitzar les interaccions entre infraestructura i territori des d’una lògica de projectes transversal que integri i articuli visions enginyeres, arquitectòniques, ambientals i patrimonials

    Surface‐Functionalized Nanoparticles as Catalysts for Artificial Photosynthesis

    No full text
    Analogously to enzymatic catalysis, where the active metal sites and their environment are controlled by protein residues, the catalytic properties of metal nanoparticles (NPs) can be tuned by carefully selecting their surface-coordinated species. In artificial photosynthesis, surface-functionalization emerged in the last decade, grounded on the development of reliable methods for tailored synthesis, advanced characterization and theoretical modeling of metal NPs, altogether with the aim of transferring to the nanoscale the mechanistic knowledge acquired from molecular complexes. Metal NPs surface-functionalization modulates the energetics of key catalytic intermediates, introduces second coordination sphere effects, influences the catalyst-electrolyte interface, and determines the metal NPs surface coverage and, accordingly, the number of accessible active sites. In photoactivated systems, metal NPs surface-functionalization may play a key role in modulating the charge transfers and recombination processes between the light absorber and the active sites and in the light absorber itself. Thus, after a presentation of the most relevant synthetic methods to produce well-defined surface-functionalized metal NPs, a critical analysis of why the above effects are the cornerstone in enhancing their catalytic performance in the key processes of artificial photosynthesis, namely the oxygen evolution reaction, the hydrogen evolution reaction, and the CO2 reduction reaction, is given

    Hardware-software coherence protocol for the coexistence of caches and local memories

    No full text
    Cache coherence protocols limit the scalability of multicore and manycore architectures and are responsible for an important amount of the power consumed in the chip. A good way to alleviate these problems is to introduce a local memory alongside the cache hierarchy, forming a hybrid memory system. Local memories are more power-efficient than caches and do not generate coherence traffic, but they suffer from poor programmability. When non-predictable memory access patterns are found, compilers do not succeed in generating code because of the incoherence between the two storages. This paper proposes a coherence protocol for hybrid memory systems that allows the compiler to generate code even in the presence of memory aliasing problems. Coherence is ensured by a software/hardware co-design where the compiler identifies potentially incoherent memory accesses and the hardware diverts them to the correct copy of the data. The coherence protocol introduces overheads of 0.26% in execution time and of 2.03% in energy consumption to enable the usage of the hybrid memory system, which outperforms cache-based systems by an speedup of 38% and an energy reduction of 27%.Peer Reviewe

    Coherence protocol for transparent management of scratchpad memories in shared memory manycore architectures

    No full text
    The increasing number of cores in manycore architectures causes important power and scalability problems in the memory subsystem. One solution is to introduce scratchpad memories alongside the cache hierarchy, forming a hybrid memory system. Scratchpad memories are more power-efficient than caches and they do not generate coherence traffic, but they suffer from poor programmability. A good way to hide the programmability difficulties to the programmer is to give the compiler the responsibility of generating code to manage the scratchpad memories. Unfortunately, compilers do not succeed in generating this code in the presence of random memory accesses with unknown aliasing hazards. This paper proposes a coherence protocol for the hybrid memory system that allows the compiler to always generate code to manage the scratchpad memories. In coordination with the compiler, memory accesses that may access stale copies of data are identified and diverted to the valid copy of the data. The proposal allows the architecture to be exposed to the programmer as a shared memory manycore, maintaining the programming simplicity of shared memory models and preserving backwards compatibility. In a 64-core manycore, the coherence protocol adds overheads of 4% in performance, 8% in network traffic and 9% in energy consumption to enable the usage of the hybrid memory system that, compared to a cache-based system, achieves a speedup of 1.14x and reduces on-chip network traffic and energy consumption by 29% and 17%, respectively.This work has been supported by the Spanish Government (grant SEV-2011-00067 of the Severo Ochoa Program), by the Spanish Ministry of Science and Innovation (contract TIN2012-34557), by Generalitat de Catalunya (contracts 2014-SGR-1051 and 2014-SGR-1272), and by the RoMoL ERC Advanced Grant (GA 321253). Miquel Moreto has been partially supported by the Ministry of Economy and Competitiveness under Juan de la Cierva postdoctoral fellowship number JCI-2012-15047, and Marc Casas is supported by the Secretary for Universities and Research of the Ministry of Economy and Knowledge of the Government of Catalonia and the Cofund programme of the Marie Curie Actions of the 7th R&D Framework Programme of the European Union (Contract 2013 BP_B 00243)

    Coherence protocol for transparent management of scratchpad memories in shared memory manycore architectures

    No full text
    The increasing number of cores in manycore architectures causes important power and scalability problems in the memory subsystem. One solution is to introduce scratchpad memories alongside the cache hierarchy, forming a hybrid memory system. Scratchpad memories are more power-efficient than caches and they do not generate coherence traffic, but they suffer from poor programmability. A good way to hide the programmability difficulties to the programmer is to give the compiler the responsibility of generating code to manage the scratchpad memories. Unfortunately, compilers do not succeed in generating this code in the presence of random memory accesses with unknown aliasing hazards. This paper proposes a coherence protocol for the hybrid memory system that allows the compiler to always generate code to manage the scratchpad memories. In coordination with the compiler, memory accesses that may access stale copies of data are identified and diverted to the valid copy of the data. The proposal allows the architecture to be exposed to the programmer as a shared memory manycore, maintaining the programming simplicity of shared memory models and preserving backwards compatibility. In a 64-core manycore, the coherence protocol adds overheads of 4% in performance, 8% in network traffic and 9% in energy consumption to enable the usage of the hybrid memory system that, compared to a cache-based system, achieves a speedup of 1.14x and reduces on-chip network traffic and energy consumption by 29% and 17%, respectively.This work has been supported by the Spanish Government (grant SEV-2011-00067 of the Severo Ochoa Program), by the Spanish Ministry of Science and Innovation (contract TIN2012-34557), by Generalitat de Catalunya (contracts 2014-SGR-1051 and 2014-SGR-1272), and by the RoMoL ERC Advanced Grant (GA 321253). Miquel Moreto has been partially supported by the Ministry of Economy and Competitiveness under Juan de la Cierva postdoctoral fellowship number JCI-2012-15047, and Marc Casas is supported by the Secretary for Universities and Research of the Ministry of Economy and Knowledge of the Government of Catalonia and the Cofund programme of the Marie Curie Actions of the 7th R&D Framework Programme of the European Union (Contract 2013 BP_B 00243)

    Infraestructura viària i sistema territorial. Identitat, natura, economia i participació : la variant d’Olot i l'encaix a les Preses i la Vall d'en Bas

    No full text
    Descripció del recurs: 21 d'octubre de 2015Aquest llibre exposa les reflexions i propostes per al traçat viari de l’eix Bracons al seu pas pels municipis de les Preses i de la Vall d’en Bas, considerant especialment la seva comptabilitat amb la continuïtat de l’activitat agrícola i la necessària reordenació de la seva travessera urbana. Es tracta d’una oportunitat per explorar noves metodologies i instruments per al planejament i projecte d’infraestructures. Es presenten els resultats del Workshop organitzat de forma coordinada entre un grup de recerca de la universitat (IntraScapeLab-EXIT-UPC) i una entitat del tercer sector ambiental (CST). L’objectiu és analitzar les interaccions entre infraestructura i territori des d’una lògica de projectes transversal que integri i articuli visions enginyeres, arquitectòniques, ambientals i patrimonials
    corecore